[PATCH 0/2] arm: socfpga: arria10: allow to reprogram FPGA with warm reboot

Chee, Tien Fong tien.fong.chee at intel.com
Fri Mar 1 09:13:18 CET 2024



> -----Original Message-----
> From: Michał Barnaś <barnas at google.com>
> Sent: Thursday, February 29, 2024 9:49 PM
> To: Dinh Nguyen <dinguyen at kernel.org>
> Cc: u-boot at lists.denx.de; Marcel Ziswiler <marcel.ziswiler at toradex.com>;
> Marek Vasut <marex at denx.de>; Martyn Welch
> <martyn.welch at collabora.com>; Paweł Anikiel <pan at semihalf.com>; Simon
> Glass <sjg at chromium.org>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; Svyatoslav Ryhel
> <clamor95 at gmail.com>; Chee, Tien Fong <tien.fong.chee at intel.com>; Tom
> Rini <trini at konsulko.com>
> Subject: Re: [PATCH 0/2] arm: socfpga: arria10: allow to reprogram FPGA with
> warm reboot
> 
> On Thu, Feb 29, 2024 at 2:03 PM Dinh Nguyen <dinguyen at kernel.org> wrote:
> >
> >
> >
> > On 2/22/24 09:20, Michał Barnaś wrote:
> > >
> > > By default, the board requires power cycle (cold boot) to program
> > > the FPGA with bitstream. This change adds Kconfig that allows to
> > > enable reprogramming the FPGA with every boot. This makes the update
> > > process of the bitstream on the filesystem to be applied with simple
> > > system reboot.
> > >
> > >
> >
> > If we want to enable the reprogramming on every boot, would it make
> > sense to just do it and not even bother with the Kconfig option?
> >
> > Dinh
> 
> The FPGA programming part takes quite a long time, so it increases the
> reboot time significantly.
> I don't think that everyone needs the reprogramming to happen every time.
> We need that because our boards are closed in the lab and the power is not
> easily accessible, so in case of update to the bitstream, we should be able to
> remotely update it with a pure warm reboot.
> So I thought that this should be set by Kconfig to not bother other users with
> longer reboot times.
> 
> Michał

Reprogram should be avoided when FPGA already in user mode, this is for FPGA boot first use case.

Full reprogram is slow in SPL, because  very small buffer in this small OCRAM can only be used to process the full RBF.

Since this is an optional configuration, I don't see any issue with these changes.

Tien Fong


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