Index: cpu/mips/au1x00_serial.c
===================================================================
RCS file: /cvsroot/u-boot/u-boot/cpu/mips/au1x00_serial.c,v
retrieving revision 1.2
diff -p -u -r1.2 au1x00_serial.c
--- cpu/mips/au1x00_serial.c	9 Jan 2005 22:28:58 -0000	1.2
+++ cpu/mips/au1x00_serial.c	15 Feb 2005 15:09:44 -0000
@@ -70,9 +70,21 @@ void serial_setbrg (void)
 {
 	volatile u32 *uart_clk = (volatile u32*)(UART0_ADDR+UART_CLK);
 	volatile u32 *uart_lcr = (volatile u32*)(UART0_ADDR+UART_LCR);
+        volatile u32 *sys_powerctrl = (u32 *)SYS_POWERCTRL;
+        int sd;
+        int divisorx2;
 
-	/* Set baudrate - FIXME for bus speeds != CPU/2 */
-	*uart_clk = ((CFG_HZ/(CONFIG_BAUDRATE * 64)));
+        /* sd is system clock divisor             */
+        /* see section 10.4.5 in au1550 datasheet */
+        sd = (*sys_powerctrl & 0x03) + 2;
+
+        /* calulate 2x baudrate and round */
+        divisorx2 = ((CFG_HZ/(sd * 16 * CONFIG_BAUDRATE)));
+
+        if (divisorx2 & 0x01)
+                divisorx2 = divisorx2 + 1;
+
+	*uart_clk = divisorx2 / 2;
 
 	/* Set parity, stop bits and word length to 8N1 */
 	*uart_lcr = UART_LCR_WLEN8;