objdump u-boot.bin:

   ldr      r0,   =GPDR2
a30804f0:       e59f021c        ldr     r0, [pc, #540]  ; a3080714 <.text+0x714>
   ldr      r1,   =CFG_GPDR2_VAL
a30804f4:       e3a01902        mov     r1, #32768      ; 0x8000
   str      r1,   [r0]
a30804f8:       e5801000        str     r1, [r0]

   ldr      r0,   =GAFR0_L
a30804fc:       e59f0214        ldr     r0, [pc, #532]  ; a3080718 <.text+0x718>
   ldr      r1,   =CFG_GAFR0_L_VAL
a3080500:       e3a01000        mov     r1, #0  ; 0x0
   str      r1,   [r0]
a3080504:       e5801000        str     r1, [r0]

   ldr      r0,   =GAFR0_U
a3080508:       e59f020c        ldr     r0, [pc, #524]  ; a308071c <.text+0x71c>
   ldr      r1,   =CFG_GAFR0_U_VAL
a308050c:       e3a01000        mov     r1, #0  ; 0x0
   str      r1,   [r0]
a3080510:       e5801000        str     r1, [r0]

   ldr      r0,   =GAFR1_L
a3080514:       e59f0204        ldr     r0, [pc, #516]  ; a3080720 <.text+0x720>

----------------------------------------------------------------------------
BDI2000 output while single step (this is without VECTOR CATCH directive)

...
Core#0>ti
    Core number       : 0
    Core state        : debug mode (ARM)
    Debug entry cause : Single Step
    Current PC        : 0x000004f8
    Current CPSR      : 0xa00000d3 (Supervisor)
Core#0>ti
    Core number       : 0
    Core state        : debug mode (ARM)
    Debug entry cause : Single Step
    Current PC        : 0x000004fc
    Current CPSR      : 0xa00000d3 (Supervisor)
Core#0>ti
- Vector Tables in Mini IC updated (low : high)
-     0xEAFFC20E : 0xEA00020E
-     0x00000000 : 0xE1200070
-     0x23001010 : 0xE1200070
-     0x33300000 : 0xE1200070
-     0xE59FF014 : 0xE1200070
-     0xE59FF014 : 0xE1200070
-     0xE59FF014 : 0xE1200070
-     0xE59FF014 : 0xE1200070
    Core number       : 0
    Core state        : debug mode (ARM)
    Debug entry cause : Single Step
    Current PC        : 0x00000500
    Current CPSR      : 0xa00000d3 (Supervisor)
Core#0>ti
    Core number       : 0
    Core state        : debug mode (ARM)
    Debug entry cause : Single Step
    Current PC        : 0x00000504
    Current CPSR      : 0xa00000d3 (Supervisor)
Core#0>ti
    Core number       : 0
    Core state        : debug mode (ARM)
    Debug entry cause : Single Step
    Current PC        : 0x00000508
    Current CPSR      : 0xa00000d3 (Supervisor)
Core#0>ti
    Core number       : 0
    Core state        : debug mode (ARM)
    Debug entry cause : External Debug Event
    Current PC        : 0x00000008
    Current CPSR      : 0xa00000db (Undefined)
# Step timeout detected



----------------------------------------------------------------------------
BDI2000 output while single step (this is with VECTOR CATCH 0xDE).
This time 'UNDEFINED' instruction occoured. DATA ABORT and 
PREFETCH ABORT were also seen...

...
- Core#0: BDI clears hold_rst
- TARGET: resetting target passed
- TARGET: processing target startup ....
- TARGET: processing target startup passed
Core#0>g
- Vector Tables in Mini IC updated (low : high)
-     0xEAFFC20E : 0xEA00020E
-     0xE59FF014 : 0xE1200070
-     0xE59FF014 : 0xE1200070
-     0xE59FF014 : 0xE1200070
-     0xE59FF014 : 0xE1200070
-     0xE59FF014 : 0xE1200070
-     0xE59FF014 : 0xE1200070
-     0xE59FF014 : 0xE1200070
- Core#0: Invalid debug entry message ignored
- Core#0: Invalid debug entry message ignored
- TARGET: core #0 has entered debug mode
Core#0>g
- TARGET: core #0 has entered debug mode
Core#0>i
    Core number       : 0
    Core state        : debug mode (ARM)
    Debug entry cause : Vector Trap (UNDEFINED)
    Current PC        : 0x00000508
    Current CPSR      : 0xa00000d3 (Supervisor)