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Jerry,<BR>
<BR>
The 83xx chips have a separate memory bus for DDR, with its own chip selects. For these chips, you do in fact need to use the local bus CS0 for your boot flash/EEPROM.<BR>
<BR>
I can't find anything in the manual that differentiates between the DDR chip selects, so using CS2/3 was probably just a design choice.<BR>
<BR>
regards,<BR>
Ben<BR>
<BR>
On Tue, 2006-04-18 at 10:02 -0400, Jerry Van Baren wrote:
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<PRE>
<FONT COLOR="#000000">Aziz Mzili wrote:</FONT>
<FONT COLOR="#000000">> </FONT>
<FONT COLOR="#000000">> Hi</FONT>
<FONT COLOR="#000000">> </FONT>
<FONT COLOR="#000000">> I'm wondering why in cpu/83xx/spd_ram.c we expect the DDR ram to be on </FONT>
<FONT COLOR="#000000">> cs2 and cs3. Is there any issue with it on cs0 and cs1 ?</FONT>
<FONT COLOR="#000000">> </FONT>
<FONT COLOR="#000000">> thank you</FONT>
<FONT COLOR="#000000">> </FONT>
<FONT COLOR="#000000">> Aziz Mzili</FONT>
<FONT COLOR="#000000">I'm not a 834x expert, but all my experience is that CS0 is used to boot </FONT>
<FONT COLOR="#000000">the processor. If it is DDR RAM rather than flash, someone other than </FONT>
<FONT COLOR="#000000">the 834x must initialize the DDR RAM and load it with the boot program. </FONT>
<FONT COLOR="#000000"> That is possible, but very uncommon.</FONT>
<FONT COLOR="#000000">gvb</FONT>
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