<DIV> </DIV>
<DIV> </DIV>
<DIV> </DIV>---------- 转发邮件信息 ----------<BR>From:yeshi208@126.com<BR>Date:2007-04-29 13:07:04<BR>Subject:[U-Boot-Users] A starter of por ting u-bo ot to a new boar d<BR>To:"eric miao" <ERIC.Y.MIAO@GMAIL.COM><BR><BR><BR>
<DIV>Dear Eric:</DIV>
<DIV> First, Thank you very much for your advice,and it is very important for me - A newer to u-boot. I have check my config.mk file , and I set TEXT_BASE = 0x30800000 there, It doesn't seem to be wrong, But I am not sure. So I will explan the situation of my board below , Please help me to find the reason , any suggestions are welcome:)</DIV>
<DIV> The situations of my board:</DIV>
<DIV>========================================</DIV>
<DIV>0x20000000---->2 chip norFlash(Intel TE28F160)--->2x2MB</DIV>
<DIV>0x30000000---->2 chip SDRAM(SAMSUNG K4S641632K-UC75)--->2x8MB</DIV>
<DIV> </DIV>
<DIV>When powered on, the board remap 0x20000000(flash) to 0x00000000,so it can boot from flash, and In the procedure of cpu_init_crit which is in start.S,After initialize the EMI(external memory interface) and PMU(power management unit),I remap 0x30000000 to 0x00000000, then it relocate itself if needed.</DIV>
<DIV> </DIV>
<DIV>In the config file , I defined:</DIV>
<DIV>=========================================</DIV>
<DIV>#define CONFIG_NR_DRAM_BANKS 1 <BR>#define PHYS_SDRAM_1 0x30000000</DIV>
<DIV>#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */</DIV>
<DIV>#define PHYS_FLASH_1 0x20000000 /* Flash Bank #1 */<BR>#define PHYS_FLASH_SIZE 0x00400000 /* 2 MB */</DIV>
<DIV>#define CFG_FLASH_BASE PHYS_FLASH_1</DIV>
<DIV>/*-----------------------------------------------------------------------<BR> * FLASH organization<BR> */<BR>#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */<BR>#define CFG_MAX_FLASH_SECT 39 /* max num of sects on one chip */</DIV>
<DIV>#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */<BR>#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */</DIV>
<DIV> </DIV>
<DIV>questions</DIV>
<DIV>================================================</DIV>
<DIV>And I still can not know what the 'bank' here mean. The above just modified from other code.</DIV>
<DIV> </DIV>
<DIV>And I also definee CFG_LOAD_ADDR=0x30800000 /* default load address */ here.</DIV>
<DIV>But I don't distinguish TEXT_BASE from CFG_LOAD_ADDR.</DIV>
<DIV> </DIV>
<DIV>Looking forward for your replay:)</DIV>
<DIV> </DIV>
<DIV>Best Wishes.</DIV>
<DIV> </DIV>
<DIV>yeshi</DIV><!-- CoreMail Version 3.1_dev Copyright (c) 2002-2007 www.mailtech.cn --><BR><!-- footer --><BR>
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