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<p><tt>Hello Zhang,<br>
</tt><br>
<tt>Thank you for your quick response!</tt><br>
<br>
<tt>> > 1. Why are you defining two macros, called 'readl' and 'writel', while<br>
> > both of these are available from asm/io.h on all architectures?<br>
> <br>
> Yes, but here they're special macros for USB register access. You can<br>
> refer to the newest usb-git tree of Markus.<br>
</tt><br>
<tt>I see; Endianity is a bit tricky here. Though the similar name appeared a bit ambiguous to me.</tt><br>
<tt><br>
> > 2. In 'usb_lowlevel_int' the register base address isn't translated<br>
> > from PCI address space to processor address space.<br>
> <br>
> Does current codes not run well on your system? It's in U-boot now. The<br>
> address in the PCI bar is processor address.<br>
</tt><br>
<tt>No, unfortunately not, but I didn't expect it to work right away ;-).</tt><br>
<br>
<tt>I am currently using Markus' u-boot-usb.git repository which is the cleaned up version, as I understand. Our platform is a MIPS32 (4Kec) based asic running in Little Endian mode with a proprietary PCI bus bridge and a quite common ISP1564 OHCI USB controller. Our PCI bus is running properly: We've been using a RTL8139 Ethernet card under U-Boot successfully for a long time.</tt><br>
<br>
<tt>The PCI BARs configure the address decoders of a PCI device and thus hold the devices address in PCI space. If your platform uses a non translating PCI bus bridge that address will be indentical to the address in the processors address space. But some platforms use translating bus bridges, such as the Hawk on the PowerPC platform. The RealTek RTL8139 Ethernet driver (drivers/rtl8139.c) uses 'pci_mem_to_phys' (from pci.h) to translate the address read from BAR1 to an address in processor space.</tt><br>
<br>
<tt>An extra complication is in the memory architecture of the MIPS: On the MIPS the CPU always uses virtual addresses, even when the MMU is off. So, we have to translate a physical register address to a virtual address in the uncached memory segment. The RTL8139 driver seems to do this correctly for the MIPS platform, but I didn't yet take the time to figure out how. For the time being a 'base |= 0xA0000000' suffices.</tt><br>
<br>
<tt>I'm still not 100% confident in the Endianity because we are running our MIPS in Little Endian mode, but that hasn't got my focus right now because I assume you have thought about this a lot longer than I did :-).</tt><br>
<br>
<tt>With kind regards,</tt><br>
<br>
<tt> Robert.</tt></body></html>