diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c
index 1748ea9..707cf33 100644
--- a/cpu/mcf52x2/cpu_init.c
+++ b/cpu/mcf52x2/cpu_init.c
@@ -184,6 +184,14 @@ void cpu_init_f (void)
 #ifndef CONFIG_MONITOR_IS_IN_RAM
 	/* Set speed /PLL */
 	MCFCLOCK_SYNCR =  MCFCLOCK_SYNCR_MFD(CFG_MFD) | MCFCLOCK_SYNCR_RFD(CFG_RFD);
+#ifdef CFG_CCM_SIZ
+	/* Enable / Disable PortE[3:2] as SIZ[1:0] */
+ #if (CFG_CCM_SIZ == 0)
+	MCFCCM_CCR = MCFCCM_CCR & (~MCFCCM_CCR_SZEN);
+ #else
+	MCFCCM_CCR = MCFCCM_CCR | (MCFCCM_CCR_SZEN);
+ #endif
+#endif
 
 	/* Set up the GPIO ports */
 #ifdef CFG_PEPAR
@@ -239,8 +247,12 @@ void cpu_init_f (void)
 	#else
 		#error	"CFG_CS0_WIDTH: Fault - wrong bus with for CS0"
 	#endif
+	#ifndef CFG_CS0_BEM
+		#define CFG_CS0_BEM 0
+	#endif
 	MCFCSM_CSCR0 =	MCFCSM_CSCR_WS(CFG_CS0_WS)
 			|CFG_CS0_PS
+			|MCFCSM_CSCR_BEM(CFG_CS0_BEM)
 			|MCFCSM_CSCR_AA;
 
 	#if (CFG_CS0_RO != 0)
@@ -268,8 +280,12 @@ void cpu_init_f (void)
 	#else
 		#error	"CFG_CS1_WIDTH: Fault - wrong bus with for CS1"
 	#endif
+	#ifndef CFG_CS1_BEM
+		#define CFG_CS1_BEM 0
+	#endif
 	MCFCSM_CSCR1 =	MCFCSM_CSCR_WS(CFG_CS1_WS)
 			|CFG_CS1_PS
+			|MCFCSM_CSCR_BEM(CFG_CS1_BEM)
 			|MCFCSM_CSCR_AA;
 
 	#if (CFG_CS1_RO != 0)
@@ -299,8 +315,12 @@ void cpu_init_f (void)
 	#else
 		#error	"CFG_CS2_WIDTH: Fault - wrong bus with for CS2"
 	#endif
+	#ifndef CFG_CS2_BEM
+		#define CFG_CS2_BEM 0
+	#endif
 	MCFCSM_CSCR2 =	MCFCSM_CSCR_WS(CFG_CS2_WS)
 			|CFG_CS2_PS
+			|MCFCSM_CSCR_BEM(CFG_CS2_BEM)
 			|MCFCSM_CSCR_AA;
 
 	#if (CFG_CS2_RO != 0)
@@ -330,8 +350,12 @@ void cpu_init_f (void)
 	#else
 		#error	"CFG_CS3_WIDTH: Fault - wrong bus with for CS1"
 	#endif
+	#ifndef CFG_CS3_BEM
+		#define CFG_CS3_BEM 	0
+	#endif
 	MCFCSM_CSCR3 =	MCFCSM_CSCR_WS(CFG_CS3_WS)
 			|CFG_CS3_PS
+			|MCFCSM_CSCR_BEM(CFG_CS3_BEM)
 			|MCFCSM_CSCR_AA;
 
 	#if (CFG_CS3_RO != 0)
diff --git a/doc/README.m68k b/doc/README.m68k
index 6dea2b5..6351aef 100644
--- a/doc/README.m68k
+++ b/doc/README.m68k
@@ -152,6 +152,8 @@ CFG_CSx_WIDTH	-- defines the bus with of chip select x
 CFG_CSx_RO 	-- if set to 0 chip select x is read/wirte
 			else chipselct is read only
 CFG_CSx_WS	-- defines the number of wait states  of chip select x
+CFG_CSx_BEM	-- if set to 1 chip select x BS is asserted for read and write
+			else BS is asserted for data write only
 
 CFG_PxDDR	-- defines the contents of the Data Direction Registers
 CFG_PxDAT	-- defines the contents of the Data Registers
@@ -160,6 +162,8 @@ CFG_PXCNT	-- defines the contents of the Port Configuration Registers
 CFG_PxPAR	-- defines the function of ports
 
 
+
+
 5. COMPILER
 -----------
 To create U-Boot the gcc-2.95.3 compiler set (m68k-elf-20030314) from uClinux.org was used.