/*
 * Myboard Device Tree Source
 *
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/*
 * WARNING: Do not depend on this tree layout remaining static just yet.
 * The MPC5200 device tree conventions are still in flux
 * Keep an eye on the linuxppc-dev mailing list for more details
 */

/ {
	model = "fsl,myboard";
	// revision = "1.0";
	compatible = "fsl,bmboard\0generic-mpc5200";
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,5200@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <20>;
			i-cache-line-size = <20>;
			d-cache-size = <4000>;		// L1, 16K
			i-cache-size = <4000>;		// L1, 16K
			timebase-frequency = <0>;	// from bootloader
			bus-frequency = <0>;		// from bootloader
			clock-frequency = <0>;		// from bootloader
			32-bit;
		};
	};

	memory {
		device_type = "memory";
		reg = <00000000 8000000>;	// 128MB
	};

	soc5200@f0000000 {
		model = "fsl,mpc5200b";
		compatible = "mpc5200";
		revision = "";			// from bootloader
		#interrupt-cells = <3>;
		device_type = "soc";
		ranges = <0 f0000000 f0010000>;
		reg = <f0000000 00000100>;
		bus-frequency = <0>;		// from bootloader
		system-frequency = <0>;		// from bootloader

		cdm@200 {
			compatible = "mpc5200b-cdm\0mpc5200-cdm";
			reg = <200 38>;
		};

		mpc5200_pic: pic@500 {
			// 5200 interrupts are encoded into two levels;
			interrupt-controller;
			#interrupt-cells = <3>;
			device_type = "interrupt-controller";
			compatible = "mpc5200b-pic\0mpc5200-pic";
			reg = <500 80>;
			built-in;
		};

		gpt@600 {	// General Purpose Timer
			compatible = "mpc5200b-gpt\0mpc5200-gpt";
			device_type = "gpt";
			cell-index = <0>;
			reg = <600 10>;
			interrupts = <1 9 0>;
			interrupt-parent = <&mpc5200_pic>;
			has-wdt;
		};

		gpt@610 {	// General Purpose Timer
			compatible = "mpc5200b-gpt\0mpc5200-gpt";
			device_type = "gpt";
			cell-index = <1>;
			reg = <610 10>;
			interrupts = <1 a 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		gpt@620 {	// General Purpose Timer
			compatible = "mpc5200b-gpt\0mpc5200-gpt";
			device_type = "gpt";
			cell-index = <2>;
			reg = <620 10>;
			interrupts = <1 b 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		gpt@630 {	// General Purpose Timer
			compatible = "mpc5200b-gpt\0mpc5200-gpt";
			device_type = "gpt";
			cell-index = <3>;
			reg = <630 10>;
			interrupts = <1 c 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		gpt@640 {	// General Purpose Timer
			compatible = "mpc5200b-gpt\0mpc5200-gpt";
			device_type = "gpt";
			cell-index = <4>;
			reg = <640 10>;
			interrupts = <1 d 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		gpt@650 {	// General Purpose Timer
			compatible = "mpc5200b-gpt\0mpc5200-gpt";
			device_type = "gpt";
			cell-index = <5>;
			reg = <650 10>;
			interrupts = <1 e 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		gpt@660 {	// General Purpose Timer
			compatible = "mpc5200b-gpt\0mpc5200-gpt";
			device_type = "gpt";
			cell-index = <6>;
			reg = <660 10>;
			interrupts = <1 f 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		gpt@670 {	// General Purpose Timer
			compatible = "mpc5200b-gpt\0mpc5200-gpt";
			device_type = "gpt";
			cell-index = <7>;
			reg = <670 10>;
			interrupts = <1 10 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		rtc@800 {	// Real time clock
			compatible = "mpc5200b-rtc\0mpc5200-rtc";
			device_type = "rtc";
			reg = <800 100>;
			interrupts = <1 5 0 1 6 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		mscan@900 {
			device_type = "mscan";
			compatible = "mpc5200b-mscan\0mpc5200-mscan";
			cell-index = <0>;
			interrupts = <2 11 0>;
			interrupt-parent = <&mpc5200_pic>;
			reg = <900 80>;
		};

		mscan@980 {
			device_type = "mscan";
			compatible = "mpc5200b-mscan\0mpc5200-mscan";
			cell-index = <1>;
			interrupts = <2 12 0>;
			interrupt-parent = <&mpc5200_pic>;
			reg = <980 80>;
		};

		gpio@b00 {
			compatible = "mpc5200b-gpio\0mpc5200-gpio";
			reg = <b00 40>;
			interrupts = <1 7 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		gpio-wkup@c00 {
			compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
			reg = <c00 40>;
			interrupts = <1 8 0 0 3 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		spi@f00 {
			device_type = "spi";
			compatible = "mpc5200b-spi\0mpc5200-spi";
			reg = <f00 20>;
			interrupts = <2 d 0 2 e 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		usb@1000 {
			device_type = "usb-ohci-be";
			compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
			reg = <1000 ff>;
			interrupts = <2 6 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

//		bestcomm@1200 {
//			device_type = "dma-controller";
//			compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm";
//			reg = <1200 80>;
//			interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
//			              3 4 0  3 5 0  3 6 0  3 7 0
//			              3 8 0  3 9 0  3 a 0  3 b 0
//			              3 c 0  3 d 0  3 e 0  3 f 0>;
//			interrupt-parent = <&mpc5200_pic>;
//		};

		xlb@1f00 {
			compatible = "mpc5200b-xlb\0mpc5200-xlb";
			reg = <1f00 100>;
		};

		// PSC1 in uart mode
		serial@2000 {		// PSC1
			device_type = "serial";
			compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
			port-number = <0>;  // Logical port assignment
			cell-index = <0>;
			reg = <2000 100>;
			interrupts = <2 1 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		// PSC2 in uart mode
//		serial@2200 {		// PSC2
//			device_type = "serial";
//			compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
//			port-number = <1>;  // Logical port assignment
//			cell-index = <1>;
//			reg = <2200 100>;
//			interrupts = <2 2 0>;
//			interrupt-parent = <&mpc5200_pic>;
//		};

		// PSC3 in uart mode example
//		serial@2400 {		// PSC3
//			device_type = "serial";
//			compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
//			cell-index = <2>;
//			reg = <2400 100>;
//			interrupts = <2 3 0>;
//			interrupt-parent = <&mpc5200_pic>;
//		};
		
		// PSC4 in uart mode example
//		serial@2600 {		// PSC4
//			device_type = "serial";
//			compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
//			cell-index = <3>;
//			reg = <2600 100>;
//			interrupts = <2 b 0>;
//			interrupt-parent = <&mpc5200_pic>;
//		};

		ethernet@3000 {
			device_type = "network";
			compatible = "mpc5200b-fec\0mpc5200-fec";
			reg = <3000 800>;
			mac-address = [ 02 03 04 05 06 07 ]; // Bad!
			interrupts = <2 5 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		ata@3a00 {
			device_type = "ata";
			compatible = "mpc5200b-ata\0mpc5200-ata";
			reg = <3a00 100>;
			interrupts = <2 7 0>;
			interrupt-parent = <&mpc5200_pic>;
		};

		i2c@3d00 {
			device_type = "i2c";
			compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c";
			cell-index = <0>;
			reg = <3d00 40>;
			interrupts = <2 f 0>;
			interrupt-parent = <&mpc5200_pic>;
			fsl5200-clocking;
		};

		i2c@3d40 {
			device_type = "i2c";
			compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c";
			cell-index = <1>;
			reg = <3d40 40>;
			interrupts = <2 10 0>;
			interrupt-parent = <&mpc5200_pic>;
			fsl5200-clocking;
		};
		sram@8000 {
			device_type = "sram";
			compatible = "mpc5200b-sram\0mpc5200-sram\0sram";
			reg = <8000 4000>;
		};
	};
	
	chosen {
		linux,stdout-path = "/soc5200@f0000000/serial@2000";
		bootargs = "console=ttyPSC0,115200 panic=1";
	};
};