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<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2>Hello
all.</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2>I am currently
trying to use u-boot to boot from NAND flash as opposed to NOR flash.
</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2>We have both on our
board, but would rather just use NAND and depopulate the
NOR.</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial
size=2>Questions:</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2>There seems to be
only one complete setup that includes a bootloader and full support for NAND
booting, which is the AMCC/Sequoia board. Though my board is very similar,
we are using the PPC440EP and not the PPC440EPX, with the latter having internal
RAM. </FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2>Has anyone booted
u-boot from NAND by using the external RAM?</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2>Excerpt from
u-boot/cpu/ppc4xx/start.S starting at line 389:</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007></SPAN><SPAN class=309303619-28112007><FONT
face=Arial size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2>#if
defined(CONFIG_NAND_SPL)</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2> /*<BR> *
Enable internal SRAM<BR> */</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial
size=2> lis r2,0x7fff<BR> ori r2,r2,0xffff<BR> mfdcr r1,isram0_dpc<BR> and r1,r1,r2 /*
Disable parity check
*/<BR> mtdcr isram0_dpc,r1<BR> mfdcr r1,isram0_pmeg<BR> and r1,r1,r2 /*
Disable pwr mgmt */<BR> mtdcr isram0_pmeg,r1</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2> /*<BR> *
Copy SPL from cache into internal SRAM<BR>
*/<BR> li r4,(CFG_NAND_BOOT_SPL_SIZE >> 2) -
1<BR> mtctr r4<BR> lis r2,CFG_NAND_BOOT_SPL_SRC@h<BR> ori r2,r2,CFG_NAND_BOOT_SPL_SRC@l<BR> lis r3,CFG_NAND_BOOT_SPL_DST@h<BR> ori r3,r3,CFG_NAND_BOOT_SPL_DST@l</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial
size=2>spl_loop: <BR> lwzu r4,4(r2)<BR> stwu r4,4(r3)<BR> bdnz spl_loop</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2> /*<BR> *
Jump to code in RAM<BR> */</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007></SPAN><SPAN class=309303619-28112007><FONT
face=Arial size=2>.... etc</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2>Based on this
snippet of code, it seems to imply that the secondary program loader (NAND_SPL)
can only be used if you have internal memory. If this is the case, I don't
understand why there isn't an additional clause something
like:</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2>#if
defined(CONFIG_NAND_SPL && (CONFIG_440EPX) ||
defined(CONFIG_440GRX)))</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial size=2>Any information on
booting from NAND is greatly appreciated.</FONT></SPAN></DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=309303619-28112007><FONT face=Arial
size=2></FONT></SPAN> </DIV></BODY></HTML>