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<p>Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com></p>
<p>---</p>
<p> board/netstal/hcu5/init.S | 63 ++++++++++++++++++++++++++++++++-------------</p>
<p> 1 files changed, 45 insertions(+), 18 deletions(-)</p>
<p></p>
<p>diff --git a/board/netstal/hcu5/init.S b/board/netstal/hcu5/init.S</p>
<p>index 5ab6cd2..2b2dc52 100644</p>
<p>--- a/board/netstal/hcu5/init.S</p>
<p>+++ b/board/netstal/hcu5/init.S</p>
<p>@@ -39,41 +39,68 @@</p>
<p> tlbtab:</p>
<p> tlbtab_start</p>
<p> </p>
<p>- /* vxWorks needs this entry for the Machine Check interrupt, */</p>
<p>- /* tlbentry( 0x40000000, SZ_256M, 0, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) */</p>
<p>+#ifdef CFG_TLB_FOR_BOOT_FLASH</p>
<p>+ /* TLB#0: vxWorks needs this entry for the Machine Check interrupt, */</p>
<p>+ tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>+ /* TLB#1: TLB-entry for DDR SDRAM (Up to 2GB) */</p>
<p>+ tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>+</p>
<p>+ /* TLB#2: TLB-entry for EBC */</p>
<p>+ tlbentry( 0x80000000, SZ_256M, 0x80000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p> </p>
<p> /*</p>
<p>- * BOOT_CS (FLASH) must be second. Before relocation SA_I can be off to use the</p>
<p>+ * TLB#3: BOOT_CS (FLASH) must be forth. Before relocation SA_I can be off to use the</p>
<p> * speed up boot process. It is patched after relocation to enable SA_I</p>
<p> */</p>
<p> tlbentry( CFG_BOOT_BASE_ADDR, SZ_1M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G )</p>
<p> </p>
<p>- /* TLB-entry for PCI Memory */</p>
<p>- tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 1, AC_R|AC_W|SA_G|SA_I )</p>
<p>+#else</p>
<p>+ tlbentry( CFG_BOOT_BASE_ADDR, SZ_1M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G )</p>
<p>+#endif</p>
<p>+</p>
<p>+ /*</p>
<p>+ * TLB entries for SDRAM are not needed on this platform.</p>
<p>+ * They are dynamically generated in the SPD DDR(2) detection</p>
<p>+ * routine.</p>
<p>+ */</p>
<p>+</p>
<p>+ /* TLB#4: */</p>
<p> tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 1, AC_R|AC_W|SA_G|SA_I )</p>
<p>+ /* TLB#5: */</p>
<p> tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I )</p>
<p>+ /* TLB#6: */</p>
<p> tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I )</p>
<p> </p>
<p>- /* TLB-entry for EBC (CFG_CPLD) */</p>
<p>- /* tlbentry( CFG_CPLD, SZ_1K, CFG_CPLD, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) */</p>
<p>- /* CAN */</p>
<p>- tlbentry( CFG_CS_1, SZ_16M, CFG_CS_1, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>- /* IMC + CPLD */</p>
<p>- tlbentry( CFG_CS_2, SZ_16M, CFG_CS_2, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>- tlbentry( CFG_CS_2 + 0x1000000, SZ_16M, CFG_CS_2 + 0x1000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>- /* IMC-Fast */</p>
<p>- tlbentry( CFG_CS_3, SZ_16M, CFG_CS_3, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>- tlbentry( CFG_CS_3 + 0x1000000, SZ_16M, CFG_CS_3 + 0x1000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>-</p>
<p> /* TLB-entry for Internal Registers & OCM */</p>
<p>- tlbentry( CFG_PCI_BASE, SZ_16M, 0xe0000000, 0, AC_R|AC_W|AC_X|SA_I )</p>
<p>+ /* TLB#7: */</p>
<p>+ tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p> </p>
<p> /*TLB-entry PCI registers*/</p>
<p>+ /* TLB#8: */</p>
<p> tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p> </p>
<p> /* TLB-entry for peripherals */</p>
<p>+ /* TLB#9: */</p>
<p> tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)</p>
<p> </p>
<p>- /* TLB for SDRAM will be added by initdram (sdram.c) */</p>
<p>+ /* CAN */</p>
<p>+ /* TLB#10: */</p>
<p>+ tlbentry( CFG_CS_1, SZ_1K, CFG_CS_1, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>+</p>
<p>+ /* TLB#11: CPLD and IMC-Standard 32 MB */</p>
<p>+ tlbentry( CFG_CS_2, SZ_16M, CFG_CS_2, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>+</p>
<p>+ /* TLB#12: */</p>
<p>+ tlbentry( CFG_CS_2 + 0x1000000, SZ_16M, CFG_CS_2 + 0x1000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p> </p>
<p>+ /* IMC-Fast 32 MB */</p>
<p>+ /* TLB#13: */</p>
<p>+ tlbentry( CFG_CS_3, SZ_16M, CFG_CS_3, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>+ /* TLB#14: */</p>
<p>+ tlbentry( CFG_CS_3 + 0x1000000, SZ_16M, CFG_CS_3, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>+</p>
<p>+#ifndef CFG_TLB_FOR_BOOT_FLASH</p>
<p>+ /* TLB#15: */</p>
<p>+ tlbentry( CFG_CS_3 + 0x1000000, SZ_16M, CFG_CS_3 + 0x1000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )</p>
<p>+#endif</p>
<p> tlbtab_end</p>
<p>-- </p>
<p>1.5.2</p>
<p></p>
<p></p>
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