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Kim,<br>
<br>
please review this resubmitted patch with changes as you have requested
:<br>
<br>
- coding style issues<br>
- Makefile<br>
- Maintainer<br>
- common mpc83xx PCI code<br>
- added README.mvblm7<br>
<br>
Please let me know if anything is still invalid or not acceptable.<br>
<br>
As mentioned before the merge window is close -> take it into "next"
please.<br>
<br>
Due to size I have to split the patch.<br>
<br>
Thanks,<br>
Andre<br>
<br>
<pre wrap="">Signed-off-by: Andre Schwarz <a
class="moz-txt-link-rfc2396E"
href="mailto:andre.schwarz@matrix-vision.de"><andre.schwarz@matrix-vision.de></a>
--
</pre>
<pre wrap=""><!----></pre>
<br>
CREDITS | 5 +<br>
MAINTAINERS | 4 +<br>
MAKEALL | 1 +<br>
Makefile | 4 +-<br>
board/mvblm7/Makefile | 48 ++++<br>
board/mvblm7/config.mk | 25 ++<br>
board/mvblm7/fpga.c | 191 ++++++++++++++++<br>
board/mvblm7/fpga.h | 34 +++<br>
board/mvblm7/mvblm7.c | 133 +++++++++++<br>
board/mvblm7/mvblm7.h | 20 ++<br>
board/mvblm7/mvblm7_autoscript | 38 ++++<br>
board/mvblm7/pci.c | 144 ++++++++++++<br>
doc/README.mvblm7 | 84 +++++++<br>
include/configs/MVBLM7.h | 474
++++++++++++++++++++++++++++++++++++++++<br>
14 files changed, 1204 insertions(+), 1 deletions(-)<br>
<br>
diff --git a/CREDITS b/CREDITS<br>
index e84ef38..713f58a 100644<br>
--- a/CREDITS<br>
+++ b/CREDITS<br>
@@ -424,6 +424,11 @@ N: Paolo Scaffardi<br>
E: <a class="moz-txt-link-abbreviated" href="mailto:arsenio@tin.it">arsenio@tin.it</a><br>
D: FADS823 configuration, MPC823 video support, I2C, wireless
keyboard, lots more<br>
<br>
+N: Andre Schwarz<br>
+E: <a class="moz-txt-link-abbreviated"
href="mailto:andre.schwarz@matrix-vision.de">andre.schwarz@matrix-vision.de</a><br>
+D: Support for BlueLYNX and BlueCOUGAR series<br>
+W: <a class="moz-txt-link-abbreviated"
href="http://www.matrix-vision.com">www.matrix-vision.com</a><br>
+<br>
N: Robert Schwebel<br>
E: <a class="moz-txt-link-abbreviated"
href="mailto:r.schwebel@pengutronix.de">r.schwebel@pengutronix.de</a><br>
D: Support for csb226, logodl and innokom boards (PXA2xx)<br>
diff --git a/MAINTAINERS b/MAINTAINERS<br>
index 33821b8..93281fd 100644<br>
--- a/MAINTAINERS<br>
+++ b/MAINTAINERS<br>
@@ -367,6 +367,10 @@ Peter De Schrijver <a
class="moz-txt-link-rfc2396E" href="mailto:p2@mind.be"><p2@mind.be></a><br>
<br>
ML2 PPC4xx<br>
<br>
+Andre Schwarz <a class="moz-txt-link-rfc2396E"
href="mailto:andre.schwarz@matrix-vision.de"><andre.schwarz@matrix-vision.de></a><br>
+<br>
+ mvblm7 MPC8343<br>
+<br>
Timur Tabi <a class="moz-txt-link-rfc2396E"
href="mailto:timur@freescale.com"><timur@freescale.com></a><br>
<br>
MPC8349E-mITX MPC8349<br>
diff --git a/MAKEALL b/MAKEALL<br>
index 2a872ac..f21c34e 100755<br>
--- a/MAKEALL<br>
+++ b/MAKEALL<br>
@@ -327,6 +327,7 @@ LIST_83xx=" \<br>
MPC8360ERDK_66 \<br>
MPC837XEMDS \<br>
MPC837XERDB \<br>
+ MVBLM7 \<br>
sbc8349 \<br>
TQM834x \<br>
"<br>
diff --git a/Makefile b/Makefile<br>
index a7f886b..9d33482 100644<br>
--- a/Makefile<br>
+++ b/Makefile<br>
@@ -2078,13 +2078,15 @@ MPC837XEMDS_HOST_config: unconfig<br>
MPC837XERDB_config: unconfig<br>
@$(MKCONFIG) -a MPC837XERDB ppc mpc83xx mpc837xerdb freescale<br>
<br>
+MVBLM7_config: unconfig<br>
+ @$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7<br>
+<br>
sbc8349_config: unconfig<br>
@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349<br>
<br>
TQM834x_config: unconfig<br>
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x<br>
<br>
-<br>
#########################################################################<br>
## MPC85xx Systems<br>
#########################################################################<br>
diff --git a/board/mvblm7/Makefile b/board/mvblm7/Makefile<br>
new file mode 100644<br>
index 0000000..84cd14a<br>
--- /dev/null<br>
+++ b/board/mvblm7/Makefile<br>
@@ -0,0 +1,48 @@<br>
+#<br>
+# Copyright (C) Freescale Semiconductor, Inc. 2006. All rights
reserved.<br>
+#<br>
+# See file CREDITS for list of people who contributed to this<br>
+# project.<br>
+#<br>
+# This program is free software; you can redistribute it and/or<br>
+# modify it under the terms of the GNU General Public License as<br>
+# published by the Free Software Foundation; either version 2 of<br>
+# the License, or (at your option) any later version.<br>
+#<br>
+# This program is distributed in the hope that it will be useful,<br>
+# but WITHOUT ANY WARRANTY; without even the implied warranty of<br>
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>
+# GNU General Public License for more details.<br>
+#<br>
+# You should have received a copy of the GNU General Public License<br>
+# along with this program; if not, write to the Free Software<br>
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,<br>
+# MA 02111-1307 USA<br>
+#<br>
+<br>
+include $(TOPDIR)/config.mk<br>
+<br>
+LIB = $(obj)lib$(BOARD).a<br>
+<br>
+COBJS := $(BOARD).o pci.o fpga.o<br>
+<br>
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)<br>
+OBJS := $(addprefix $(obj),$(COBJS))<br>
+SOBJS := $(addprefix $(obj),$(SOBJS))<br>
+<br>
+$(LIB): $(obj).depend $(OBJS)<br>
+ $(AR) $(ARFLAGS) $@ $(OBJS)<br>
+<br>
+clean:<br>
+ rm -f $(SOBJS) $(OBJS)<br>
+<br>
+distclean: clean<br>
+ rm -f $(LIB) core *.bak .depend<br>
+<br>
+#########################################################################<br>
+<br>
+include $(SRCTREE)/rules.mk<br>
+<br>
+sinclude $(obj).depend<br>
+<br>
+#########################################################################<br>
diff --git a/board/mvblm7/config.mk b/board/mvblm7/config.mk<br>
new file mode 100644<br>
index 0000000..1d85f4f<br>
--- /dev/null<br>
+++ b/board/mvblm7/config.mk<br>
@@ -0,0 +1,25 @@<br>
+#<br>
+# Copyright (C) Freescale Semiconductor, Inc. 2006. All rights
reserved.<br>
+#<br>
+# See file CREDITS for list of people who contributed to this<br>
+# project.<br>
+#<br>
+# This program is free software; you can redistribute it and/or<br>
+# modify it under the terms of the GNU General Public License as<br>
+# published by the Free Software Foundation; either version 2 of<br>
+# the License, or (at your option) any later version.<br>
+#<br>
+# This program is distributed in the hope that it will be useful,<br>
+# but WITHOUT ANY WARRANTY; without even the implied warranty of<br>
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>
+# GNU General Public License for more details.<br>
+#<br>
+# You should have received a copy of the GNU General Public License<br>
+# along with this program; if not, write to the Free Software<br>
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,<br>
+# MA 02111-1307 USA<br>
+#<br>
+<br>
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp<br>
+<br>
+TEXT_BASE = 0xFFF00000<br>
diff --git a/board/mvblm7/fpga.c b/board/mvblm7/fpga.c<br>
new file mode 100644<br>
index 0000000..57ea520<br>
--- /dev/null<br>
+++ b/board/mvblm7/fpga.c<br>
@@ -0,0 +1,191 @@<br>
+/*<br>
+ * (C) Copyright 2002<br>
+ * Rich Ireland, Enterasys Networks, <a
class="moz-txt-link-abbreviated" href="mailto:rireland@enterasys.com">rireland@enterasys.com</a>.<br>
+ * Keith Outwater, <a class="moz-txt-link-abbreviated"
href="mailto:keith_outwater@mvis.com">keith_outwater@mvis.com</a>.<br>
+ *<br>
+ * (C) Copyright 2008<br>
+ * Andre Schwarz, Matrix Vision GmbH, <a
class="moz-txt-link-abbreviated"
href="mailto:andre.schwarz@matrix-vision.de">andre.schwarz@matrix-vision.de</a><br>
+ *<br>
+ * See file CREDITS for list of people who contributed to this<br>
+ * project.<br>
+ *<br>
+ * This program is free software; you can redistribute it and/or<br>
+ * modify it under the terms of the GNU General Public License as<br>
+ * published by the Free Software Foundation; either version 2 of<br>
+ * the License, or (at your option) any later version.<br>
+ *<br>
+ * This program is distributed in the hope that it will be useful,<br>
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>
+ * GNU General Public License for more details.<br>
+ *<br>
+ * You should have received a copy of the GNU General Public License<br>
+ * along with this program; if not, write to the Free Software<br>
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,<br>
+ * MA 02111-1307 USA<br>
+ *<br>
+ */<br>
+<br>
+#include <common.h><br>
+#include <ACEX1K.h><br>
+#include <command.h><br>
+#include "fpga.h"<br>
+#include "mvblm7.h"<br>
+<br>
+#ifdef CONFIG_FPGA<br>
+<br>
+#ifdef FPGA_DEBUG<br>
+#define fpga_debug(fmt,args...) printf(fmt ,##args)<br>
+#else<br>
+#define fpga_debug(fmt,args...)<br>
+#endif<br>
+<br>
+Altera_CYC2_Passive_Serial_fns altera_fns = {<br>
+ fpga_null_fn,<br>
+ fpga_config_fn,<br>
+ fpga_status_fn,<br>
+ fpga_done_fn,<br>
+ fpga_wr_fn,<br>
+ fpga_null_fn,<br>
+ fpga_null_fn,<br>
+ 0<br>
+};<br>
+<br>
+Altera_desc cyclone2 = {<br>
+ Altera_CYC2,<br>
+ passive_serial,<br>
+ Altera_EP2C20_SIZE,<br>
+ (void *) &altera_fns,<br>
+ NULL,<br>
+ 0<br>
+};<br>
+<br>
+DECLARE_GLOBAL_DATA_PTR;<br>
+<br>
+int mvblm7_init_fpga(void)<br>
+{<br>
+ fpga_debug("%s:%d: Initialize FPGA interface (relocation offset =
0x%.8lx)\n",<br>
+ __FUNCTION__, __LINE__, gd->reloc_off);<br>
+ fpga_init(gd->reloc_off);<br>
+<br>
+ fpga_debug("%s:%d: Adding fpga 0\n", __FUNCTION__, __LINE__);<br>
+ fpga_add(fpga_altera, &cyclone2);<br>
+<br>
+ return 1;<br>
+}<br>
+<br>
+int fpga_null_fn(int cookie)<br>
+{<br>
+ return 0;<br>
+}<br>
+<br>
+int fpga_config_fn(int assert, int flush, int cookie)<br>
+{<br>
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;<br>
+ volatile gpio83xx_t *gpio = (volatile gpio83xx_t
*)&im->gpio[0];<br>
+<br>
+ u32 dvo = gpio->dat;<br>
+ fpga_debug("SET config : %s\n", assert ? "low" : "high");<br>
+ if (assert) <br>
+ dvo |= FPGA_CONFIG;<br>
+ else <br>
+ dvo &= ~FPGA_CONFIG;<br>
+ <br>
+ if (flush)<br>
+ gpio->dat = dvo;<br>
+<br>
+ return assert;<br>
+}<br>
+<br>
+int fpga_done_fn(int cookie)<br>
+{<br>
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;<br>
+ volatile gpio83xx_t *gpio = (volatile gpio83xx_t
*)&im->gpio[0];<br>
+ int result = 0;<br>
+<br>
+ udelay(10);<br>
+ fpga_debug("CONF_DONE check ... ");<br>
+ if (gpio->dat & FPGA_CONF_DONE) {<br>
+ fpga_debug("high\n");<br>
+ result = 1;<br>
+ } else <br>
+ fpga_debug("low\n");<br>
+<br>
+ return result;<br>
+}<br>
+<br>
+int fpga_status_fn(int cookie)<br>
+{<br>
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;<br>
+ volatile gpio83xx_t *gpio = (volatile gpio83xx_t
*)&im->gpio[0];<br>
+ int result = 0;<br>
+<br>
+ fpga_debug("STATUS check ... ");<br>
+ if (gpio->dat & FPGA_STATUS) {<br>
+ fpga_debug("high\n");<br>
+ result = 1;<br>
+ } else <br>
+ fpga_debug("low\n");<br>
+<br>
+ return result;<br>
+}<br>
+<br>
+int fpga_clk_fn(int assert_clk, int flush, int cookie)<br>
+{<br>
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;<br>
+ volatile gpio83xx_t *gpio = (volatile gpio83xx_t
*)&im->gpio[0];<br>
+<br>
+ u32 dvo = gpio->dat;<br>
+ fpga_debug("CLOCK %s\n", assert_clk ? "high" : "low");<br>
+ if (assert_clk)<br>
+ dvo |= FPGA_CCLK;<br>
+ else<br>
+ dvo &= ~FPGA_CCLK;<br>
+<br>
+ if (flush)<br>
+ gpio->dat = dvo;<br>
+<br>
+ return assert_clk;<br>
+}<br>
+<br>
+static inline int _write_fpga(u8 val, int dump )<br>
+{<br>
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;<br>
+ volatile gpio83xx_t *gpio = (volatile gpio83xx_t
*)&im->gpio[0];<br>
+ int i;<br>
+ u32 dvo = gpio->dat;<br>
+<br>
+ if (dump)<br>
+ fpga_debug(" %02x -> ", val);<br>
+ for (i = 0; i < 8; i++) {<br>
+ dvo &= ~FPGA_CCLK;<br>
+ gpio->dat = dvo; <br>
+ dvo &= ~FPGA_DIN; <br>
+ if (dump) <br>
+ fpga_debug("%d ", val&1);<br>
+ if (val & 1) <br>
+ dvo |= FPGA_DIN;<br>
+ gpio->dat = dvo; <br>
+ dvo |= FPGA_CCLK;<br>
+ gpio->dat = dvo; <br>
+ val >>= 1;<br>
+ }<br>
+ if (dump) <br>
+ fpga_debug("\n");<br>
+<br>
+ return 0;<br>
+}<br>
+<br>
+int fpga_wr_fn(void *buf, size_t len, int flush, int cookie)<br>
+{<br>
+ unsigned char *data = (unsigned char *) buf;<br>
+ int i;<br>
+<br>
+ fpga_debug("fpga_wr: buf %p / size %d\n", buf, len);<br>
+ for (i = 0; i < len; i++) <br>
+ _write_fpga(data[i], 0); <br>
+ fpga_debug("\n");<br>
+<br>
+ return FPGA_SUCCESS;<br>
+}<br>
+#endif<br>
diff --git a/board/mvblm7/fpga.h b/board/mvblm7/fpga.h<br>
new file mode 100644<br>
index 0000000..e84ff06<br>
--- /dev/null<br>
+++ b/board/mvblm7/fpga.h<br>
@@ -0,0 +1,34 @@<br>
+/*<br>
+ * (C) Copyright 2002<br>
+ * Rich Ireland, Enterasys Networks, <a
class="moz-txt-link-abbreviated" href="mailto:rireland@enterasys.com">rireland@enterasys.com</a>.<br>
+ * Keith Outwater, <a class="moz-txt-link-abbreviated"
href="mailto:keith_outwater@mvis.com">keith_outwater@mvis.com</a>.<br>
+ *<br>
+ * See file CREDITS for list of people who contributed to this<br>
+ * project.<br>
+ *<br>
+ * This program is free software; you can redistribute it and/or<br>
+ * modify it under the terms of the GNU General Public License as<br>
+ * published by the Free Software Foundation; either version 2 of<br>
+ * the License, or (at your option) any later version.<br>
+ *<br>
+ * This program is distributed in the hope that it will be useful,<br>
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>
+ * GNU General Public License for more details.<br>
+ *<br>
+ * You should have received a copy of the GNU General Public License<br>
+ * along with this program; if not, write to the Free Software<br>
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,<br>
+ * MA 02111-1307 USA<br>
+ *<br>
+ */<br>
+<br>
+extern int mvblm7_init_fpga(void);<br>
+<br>
+extern int fpga_pgm_fn(int assert_pgm, int flush, int cookie);<br>
+extern int fpga_status_fn (int cookie);<br>
+extern int fpga_config_fn (int assert, int flush, int cookie);<br>
+extern int fpga_done_fn(int cookie);<br>
+extern int fpga_clk_fn(int assert_clk, int flush, int cookie);<br>
+extern int fpga_wr_fn (void *buf, size_t len, int flush, int cookie);<br>
+extern int fpga_null_fn (int cookie);<br>
diff --git a/board/mvblm7/mvblm7.c b/board/mvblm7/mvblm7.c<br>
new file mode 100644<br>
index 0000000..9142f14<br>
--- /dev/null<br>
+++ b/board/mvblm7/mvblm7.c<br>
@@ -0,0 +1,133 @@<br>
+/*<br>
+ * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights
reserved.<br>
+ *<br>
+ * (C) Copyright 2008<br>
+ * Andre Schwarz, Matrix Vision GmbH, <a
class="moz-txt-link-abbreviated"
href="mailto:andre.schwarz@matrix-vision.de">andre.schwarz@matrix-vision.de</a><br>
+ *<br>
+ * See file CREDITS for list of people who contributed to this<br>
+ * project.<br>
+ *<br>
+ * This program is free software; you can redistribute it and/or<br>
+ * modify it under the terms of the GNU General Public License as<br>
+ * published by the Free Software Foundation; either version 2 of<br>
+ * the License, or (at your option) any later version.<br>
+ *<br>
+ * This program is distributed in the hope that it will be useful,<br>
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>
+ * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the<br>
+ * GNU General Public License for more details.<br>
+ *<br>
+ * You should have received a copy of the GNU General Public License<br>
+ * along with this program; if not, write to the Free Software<br>
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,<br>
+ * MA 02111-1307 USA<br>
+ */<br>
+<br>
+#include <common.h><br>
+#include <ioports.h><br>
+#include <mpc83xx.h><br>
+#include <asm/mpc8349_pci.h><br>
+#include <pci.h><br>
+#include <asm/mmu.h><br>
+#if defined(CONFIG_OF_LIBFDT)<br>
+#include <libfdt.h><br>
+#endif<br>
+<br>
+#include "mvblm7.h"<br>
+<br>
+int fixed_sdram(void)<br>
+{<br>
+ volatile immap_t *im = (immap_t *)CFG_IMMR;<br>
+ u32 msize = 0;<br>
+ u32 ddr_size;<br>
+ u32 ddr_size_log2;<br>
+<br>
+ msize = CFG_DDR_SIZE;<br>
+ for (ddr_size = msize << 20, ddr_size_log2 = 0;<br>
+ (ddr_size > 1);<br>
+ ddr_size = ddr_size>>1, ddr_size_log2++) {<br>
+ if (ddr_size & 1) {<br>
+ return -1;<br>
+ }<br>
+ }<br>
+ im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12)
& 0xfffff);<br>
+ im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1)
& LAWAR_SIZE);<br>
+<br>
+ im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS;<br>
+ im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG;<br>
+ im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;<br>
+ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;<br>
+ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;<br>
+ im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;<br>
+ im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;<br>
+ im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;<br>
+ im->ddr.sdram_mode = CFG_DDR_MODE;<br>
+ im->ddr.sdram_interval = CFG_DDR_INTERVAL;<br>
+ im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;<br>
+<br>
+ udelay(300);<br>
+<br>
+ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;<br>
+<br>
+ return CFG_DDR_SIZE;<br>
+}<br>
+<br>
+long int initdram(int board_type)<br>
+{<br>
+ volatile immap_t *im = (immap_t *) CFG_IMMR;<br>
+ u32 msize = 0;<br>
+<br>
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)<br>
+ return -1;<br>
+<br>
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;<br>
+ msize = fixed_sdram();<br>
+<br>
+ /* return total bus RAM size(bytes) */<br>
+ return msize * 1024 * 1024;<br>
+}<br>
+<br>
+int checkboard(void)<br>
+{<br>
+ puts("Board: Matrix Vision mvBlueLYNX-M7 " MV_VERSION "\n");<br>
+<br>
+ return 0;<br>
+}<br>
+<br>
+u8 *dhcp_vendorex_prep(u8 * e)<br>
+{<br>
+ char *ptr;<br>
+<br>
+ /* DHCP vendor-class-identifier = 60 */<br>
+ if ((ptr = getenv("dhcp_vendor-class-identifier"))) {<br>
+ *e++ = 60;<br>
+ *e++ = strlen(ptr);<br>
+ while (*ptr)<br>
+ *e++ = *ptr++;<br>
+ }<br>
+ /* DHCP_CLIENT_IDENTIFIER = 61 */<br>
+ if ((ptr = getenv("dhcp_client_id"))) {<br>
+ *e++ = 61;<br>
+ *e++ = strlen(ptr);<br>
+ while (*ptr)<br>
+ *e++ = *ptr++;<br>
+ }<br>
+<br>
+ return e;<br>
+}<br>
+<br>
+u8 *dhcp_vendorex_proc(u8 * popt)<br>
+{<br>
+ return NULL;<br>
+}<br>
+<br>
+#if defined(CONFIG_OF_BOARD_SETUP)<br>
+void ft_board_setup(void *blob, bd_t *bd)<br>
+{<br>
+ ft_cpu_setup(blob, bd);<br>
+#ifdef CONFIG_PCI<br>
+ ft_pci_setup(blob, bd);<br>
+#endif<br>
+}<br>
+<br>
+#endif<br>
diff --git a/board/mvblm7/mvblm7.h b/board/mvblm7/mvblm7.h<br>
new file mode 100644<br>
index 0000000..eb1d2a3<br>
--- /dev/null<br>
+++ b/board/mvblm7/mvblm7.h<br>
@@ -0,0 +1,20 @@<br>
+#ifndef __MVBC_H__<br>
+#define __MVBC_H__<br>
+<br>
+#define MV_GPIO<br>
+<br>
+#define FPGA_DIN 0x20000000<br>
+#define FPGA_CCLK 0x40000000<br>
+#define FPGA_CONF_DONE 0x08000000<br>
+#define FPGA_CONFIG 0x80000000<br>
+#define FPGA_STATUS 0x10000000<br>
+<br>
+#define MAN_RST 0x00100000<br>
+#define WD_TS 0x00200000<br>
+#define WD_WDI 0x00400000<br>
+<br>
+#define MV_GPIO_DAT (WD_TS)<br>
+#define MV_GPIO_OUT (FPGA_DIN|FPGA_CCLK|WD_TS|WD_WDI)<br>
+#define MV_GPIO_ODE (FPGA_CONFIG|MAN_RST)<br>
+<br>
+#endif<br>
<br>
<br>
<br>
<BR>
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Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
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