Index: u-boot-main/drivers/net/enc28j60.c
===================================================================
--- u-boot-main.orig/drivers/net/enc28j60.c
+++ u-boot-main/drivers/net/enc28j60.c
@@ -18,8 +18,8 @@
 #include <config.h>
 #include <common.h>
 #include <net.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/spi.h>
+//#include <asm/arch/hardware.h>
+#include <spi.h>
 
 /*
  * Control Registers in Bank 0
@@ -284,10 +284,15 @@
 /* maximum frame length */
 #define ENC_MAX_FRM_LEN 1518
 
-#define enc_enable() PUT32(IO1CLR, ENC_SPI_SLAVE_CS)
-#define enc_disable() PUT32(IO1SET, ENC_SPI_SLAVE_CS)
-#define enc_cfg_spi() spi_set_cfg(0, 0, 0); spi_set_clock(8);
-
+#define enc_enable(x) spi_cs_activate(x);
+#define enc_disable(x) spi_cs_deactivate(x);
+#define spi_write(x) spi_w8r8(slave, x)
+#define spi_read() spi_w8r8(slave, 0)
+/* For the moment lets assume that we work without interrupts */
+#define spi_lock()
+#define spi_unlock()
+/* Use spi_setup_slave() instead of enc_cfg_spi() */
+#define enc_cfg_spi()
 
 static unsigned char encReadReg (unsigned char regNo);
 static void encWriteReg (unsigned char regNo, unsigned char data);
@@ -322,6 +327,8 @@ static unsigned char next_pointer_msb;
 static unsigned char buffer[ENC_MAX_FRM_LEN];
 static int rxResetCounter = 0;
 
+static struct spi_slave *slave;
+
 #define RX_RESET_COUNTER 1000;
 
 /*-----------------------------------------------------------------------------
@@ -332,15 +339,16 @@ int eth_init (bd_t * bis)
 	unsigned char estatVal;
 	uchar enetaddr[6];
 
-	/* configure GPIO */
-	(*((volatile unsigned long *) IO1DIR)) |= ENC_SPI_SLAVE_CS;
-	(*((volatile unsigned long *) IO1DIR)) |= ENC_RESET;
-
-	/* CS and RESET active low */
-	PUT32 (IO1SET, ENC_SPI_SLAVE_CS);
-	PUT32 (IO1SET, ENC_RESET);
-
 	spi_init ();
+	if (!slave) {
+		slave = spi_setup_slave(CONFIG_ENC28J60_SPI_BUS,
+					CONFIG_ENC28J60_SPI_CS,
+					CONFIG_ENC28J60_SPI_CLK,
+					SPI_MODE_3);
+		if (!slave)
+			return -1;
+	}
+	spi_claim_bus(slave);
 
 	/* taken from the Linux driver - dangerous stuff here! */
 	/* Wait for CLKRDY to become set (i.e., check that we can communicate with
@@ -592,17 +600,17 @@ static void encWriteReg (unsigned char r
 {
 	spi_lock ();
 	enc_cfg_spi ();
-	enc_enable ();
+	enc_enable (slave);
 
 	spi_write (0x40 | regNo);	/* write in regNo */
 	spi_write (data);
 
-	enc_disable ();
-	enc_enable ();
+	enc_disable (slave);
+	enc_enable (slave);
 
 	spi_write (0x1f);	/* write reg 0x1f */
 
-	enc_disable ();
+	enc_disable (slave);
 	spi_unlock ();
 }
 
@@ -615,17 +623,17 @@ static void encWriteRegRetry (unsigned c
 
 	for (i = 0; i < c; i++) {
 		enc_cfg_spi ();
-		enc_enable ();
+		enc_enable (slave);
 
 		spi_write (0x40 | regNo);	/* write in regNo */
 		spi_write (data);
 
-		enc_disable ();
-		enc_enable ();
+		enc_disable (slave);
+		enc_enable (slave);
 
 		spi_write (0x1f);	/* write reg 0x1f */
 
-		enc_disable ();
+		enc_disable (slave);
 
 		spi_unlock ();	/* we must unlock spi first */
 
@@ -649,14 +657,14 @@ static unsigned char encReadReg (unsigne
 
 	spi_lock ();
 	enc_cfg_spi ();
-	enc_enable ();
+	enc_enable (slave);
 
 	spi_write (0x1f);	/* read reg 0x1f */
 
 	bank = spi_read () & 0x3;
 
-	enc_disable ();
-	enc_enable ();
+	enc_disable (slave);
+	enc_enable (slave);
 
 	spi_write (regNo);
 	rxByte = spi_read ();
@@ -668,7 +676,7 @@ static unsigned char encReadReg (unsigne
 		rxByte = spi_read ();
 	}
 
-	enc_disable ();
+	enc_disable (slave);
 	spi_unlock ();
 
 	return rxByte;
@@ -678,7 +686,7 @@ static void encReadBuff (unsigned short
 {
 	spi_lock ();
 	enc_cfg_spi ();
-	enc_enable ();
+	enc_enable (slave);
 
 	spi_write (0x20 | 0x1a);	/* read buffer memory */
 
@@ -689,7 +697,7 @@ static void encReadBuff (unsigned short
 			spi_write (0);
 	}
 
-	enc_disable ();
+	enc_disable (slave);
 	spi_unlock ();
 }
 
@@ -697,7 +705,7 @@ static void encWriteBuff (unsigned short
 {
 	spi_lock ();
 	enc_cfg_spi ();
-	enc_enable ();
+	enc_enable (slave);
 
 	spi_write (0x60 | 0x1a);	/* write buffer memory */
 
@@ -706,7 +714,7 @@ static void encWriteBuff (unsigned short
 	while (length--)
 		spi_write (*pBuff++);
 
-	enc_disable ();
+	enc_disable (slave);
 	spi_unlock ();
 }
 
@@ -714,12 +722,12 @@ static void encBitSet (unsigned char reg
 {
 	spi_lock ();
 	enc_cfg_spi ();
-	enc_enable ();
+	enc_enable (slave);
 
 	spi_write (0x80 | regNo);	/* bit field set */
 	spi_write (data);
 
-	enc_disable ();
+	enc_disable (slave);
 	spi_unlock ();
 }
 
@@ -727,12 +735,12 @@ static void encBitClr (unsigned char reg
 {
 	spi_lock ();
 	enc_cfg_spi ();
-	enc_enable ();
+	enc_enable (slave);
 
 	spi_write (0xA0 | regNo);	/* bit field clear */
 	spi_write (data);
 
-	enc_disable ();
+	enc_disable (slave);
 	spi_unlock ();
 }
 
@@ -740,11 +748,11 @@ static void encReset (void)
 {
 	spi_lock ();
 	enc_cfg_spi ();
-	enc_enable ();
+	enc_enable (slave);
 
 	spi_write (0xff);	/* soft reset */
 
-	enc_disable ();
+	enc_disable (slave);
 	spi_unlock ();
 
 	/* sleep 1 ms. See errata pt. 2 */