[ELDK] e500mc target architecture

Wolfgang Denk wd at denx.de
Mon Dec 17 17:26:39 CET 2012


Dear Valentin,

In message <50CF3BD2.2060003 at keymile.com> you wrote:
> 
> > Could you please be a bit more specific which "advantage of the
> > e500mc cores" you have in mind that would not be supportedby the
> > generic-powerpc target of configuration of the ELDK?
> 
> I was mostly thinking about all the mechanisms introduced by the PowerISA 2.06
> Instruction set. I was thinking that even if the e500mc core is compatible with
> the PowerISA 2.03, it would be better to produce code with PowerISA 2.06.

Which of these extensions seem relevant to your applications?  I mean,
even if Power ISA v.2.06 contains new vector-scalar FP instructions, I
don't think that GCC will automatically generate these, nor can I
assess that your code would actually benefit from it.

Most of the extensions are actually about virtualisation and
hypervisor zupport.

Do you have any specific test cases and/or benchmarks that demonstrate
this, and that are relevant to your application code?

> I have mostly ARM experience and there every new core brings a new ISA that
> requires a new target architecture to really take advantage of it. Maybe this
> influenced a lot my expectations with this e500mc core and how to take advantage
> of it.



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