[U-Boot-Board-Maintainers] Thecus N2350 (Armada 385) board

bodhi bodhi mibodhi at gmail.com
Tue Nov 5 00:05:06 UTC 2019


Hi Stefan,

I'm working on new u-boot (2019.10) for this board, and would appreciate
that I can have some advice about how to use SPL properly. I've only
starting to read the SPL code for MVEBU recently.

Using the Clearfog as a starting point, I've completed a first cut of
u-boot proper, with serdes_map, topology, mpp, .. extracted from Marvell
GPL.

Then I've realized that we don't have DDR4 training code in the source tree
yet. So I tried to use the bin_hdr from Marvell to build the u-boot-spl.kwb
image.

With the ./arch/arm/mach-mvebu/kwbimage.cfg modified as followed:

> #
> # Armada 38x uses version 1 image format
> VERSION 1
> # Boot Media configurations
> BOOT_FROM uart
> # Binary Header (bin_hdr) with DDR3 training code
> BINARY /usr/src/builds-thecus-n2350/marvell_bin_hdr/bin_hdr.bin 0000005b
> 00000068

And then I manually built the image:


./tools/mkimage -n ./arch/arm/mach-mvebu/kwbimage.cfg -T kwbimage -a
> 0x00800000 -e 0x00800000  -d u-boot.img u-boot-spl.kwb >/dev/null  && cat
> /dev/null


Then try with kwboot to load the image, it crashed during or after
training. I used a pacth from Kevin Smith to implement a fallback in kwboot
to be able to handshake with the BootROM. This patch is only relevant
during the handshake to successfully catch a NAK to send boot message.

./kwboot -t -B 115200 /dev/ttyUSB0 -b u-boot-spl.kwb  -f


Sending boot message. Please reboot the target...
> Sending boot image...
>   0 %
> [......................................................................]
>  24 %
> [......................................................................]
>  26 % [...............................
> BootROM - 1.73
> Booting from SPI flash
>
> General initialization - Version: 1.0.0
> AVS selection from EFUSE disabled (Skip reading EFUSE values)
> Overriding default AVS value to: 0x23
> Detected Device ID 6820
> High speed PHY - Version: 2.0
> Init Customer board board SerDes lanes topology details:
>  | Lane # | Speed|    Type     |
>  ------------------------------|
>  |   0    |  0   |  SGMII0     |
>  |   1    |  3   |  SATA0      |
>  |   2    |  3   |  SATA1      |
>  |   4    |  5   |  USB3 HOST0 |
>  |   5    |  5   |  USB3 HOST1 |
>  -------------------------------
> High speed PHY - Ended Successfully
> DDR4 Training Sequence - Ver TIP-0.23.(Sublib 0.8)0
> +xmodem: Protocol error

Am I doing the right thing in building this image? In other words,  can the
spl/u-boot-spl.bin be replaced by Marvell bin_hdr.bin like that?

Thanks,
-bodhi
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