[U-Boot-Users] Re: Interrupt management under PPC4xx platform

[Wolfgang Denk]

In message <5.1.1.6.0.20030414164127.01cb42e0 at 192.168.2.1> you wrote:
> 
> I found a first problem in the trap_init function. Here is the situation 
> before the instruction
> rlwinm r9, r7, 0, 18, 31:
> 
> r7 = 0x7fce100
> CFG_MONITOR_LEN = 200*1024

If you look at the code,  you  will  see  that  r7  was  loaded  from
GOT(_start),  so  it  contains the entry point address of your image.
0x7fce100 seems a bit unlikely to me.

Here a couple of questions:

How did you #define CFG_MONITOR_BASE?
What's your TEXT_BASE?
How much RAM do you have on your system?
Which output is printed from the debug code in "lib_ppc/board.c"
(especially the "Now running in RAM - U-Boot at: xxx" line is of
interest).

> So r9, that contains the target address, is set to 0x2100 and consequently 
> the vectors are placed starting from there.
> If  change CFG_MONITOR_LEN to 192*1024 they are copied to the right place 
> (0x100, anybody corrects me if I'm wrong) and the PIT interrupt is ok. 

As you can read from the comments, the "rlwinm" instruction  performs
the equivalent of the C expression "_start & 0x3FFF".

> With Ethereal I monitor the LAN traffic and I can see that the PC correctly 
> answers to the ARP request. The SDRAM controller should be ok because I 
> imported the initialization code from OpenBIOS. I suspect there are some 
> slight differences in the Ethernet controller across the 405xx processors 
> (I use a 405EP). I think I should investigate the Ethernet code. Where do 
> you suggest me to start?

Please don't jump around. Let's fix one problem at a time.


Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
The software required `Windows 95 or better', so I installed Linux.