[U-Boot-Users] mpc8245 timer

[Wolfgang Denk]

In message <01C302F0.40E40DC0.robdlg at att.net> you wrote:
> The following code appears in u-boot-0.3.0/cpu/mpc824x/cpu.c
> 
> /*
>  * Get timebase clock frequency (like cpu_clk in Hz)
>  * This is the sys_logic_clk (memory bus) divided by 4
>  */
> unsigned long get_tbclk (void)
> {
> 	return ((get_bus_freq (0) + 2L) / 4L);
> }

This was designed for MPC8240 systems; where the  timebase  registers
are  incremented  once  for  every  for sys_logic_clk cycles. And all
systems I've seen so far used sys_logic_clk = 2 x PCI bus frequency.

> 
> However, in Table 11-11 of the _MPC8245 Integrated Processor User's Manual_,
> there is the statement "The timers operate at 1/8 the speed of the SDRAM_CLK signal."
> 
> Should the divisor in get_tbclk( ) be 8L for the MPC8245?

You can easily try it out: how long does "sleep 10" sleep on your system?


Best regards,

Wolfgang Denk

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