[U-Boot-Users] hang up after start_here

Frank Robbins Frank.Robbins at Analogue-Micro.com
Tue Aug 19 11:24:09 CEST 2003


Is this  Motorola MPC8XX family?

If so ...
I would suggest that if you don't turn on the MMU and the cache it may
work.... normally indicating a SDRAM problem

What are you doing to set the mode and CAS latency on your SDRAM IC's .

There is no Pure SDRAM controller on this processor family you have to do
some of the work to get SDRAM running

Once the cache and MMU are on then the chip will really ROCK the SDRAM hence
strange failures.



Regards

Frank Robbins



Analogue & Micro Ltd,
9 Clytha Park Road
Newport
South Wales
NP20 4US
United Kingdom (Great Britain)
Email : Frank.Robbins at Analogue-Micro.com
Email : Frank at Analogue-Micro.com

http://www.Analogue-Micro.com

Tel: 44 (0)1633 666787
Fax: 44 (0)1633 666788


----- Original Message ----- 
From: "Laurent Mohin" <laurent.mohin at acterna.com>
To: "Wolfgang Denk" <wd at denx.de>
Cc: <linuxppc-embedded at lists.linuxppc.org>;
<u-boot-users at lists.sourceforge.net>; <wd at denx.de>
Sent: Tuesday, August 19, 2003 8:51 AM
Subject: Re: [U-Boot-Users] hang up after start_here


>
> Wolfgang,
>
> thanks for your reply.
> How can you bet that my initialization sequence is incomplete?
> I remember you that it works on 15 boards out of 16.
>
> Laurent
>
>
>
>
>
> Wolfgang Denk <wd at denx.de>
> Sent by: wd at denx.de
> 18/08/03 10:39
>
>
>         To:     "Laurent Mohin" <laurent.mohin at acterna.com>
>         cc:     linuxppc-embedded at lists.linuxppc.org,
u-boot-users at lists.sourceforge.net
>         Subject:        Re: [U-Boot-Users] hang up after start_here
>
>
> In message
> <OFE8EA1A87.9A7B8A06-ONC1256D86.0028950A-C1256D86.002D5CE3 at se.wavetek.com>
> you wrote:
> >
> > I've debugged and found that the board hangs in start_here function and
> > doesn't reach the early_init function.
> >
> > Because the problem appears on only one of my boards out of 16, I
> suspect
> > a hardware problem, and because it occurs just after mmu initialisation
> > and caches enabling, I suspect more especially sdram accesses.
> >
> > I want to know if anybody has encountered a similar problem and if the
> > diagnostic was the same.
>
> This is a standard problem, which can show up in many forms.  My  bet
> is  that  your  SDRAM initialization sequence is incomplete / broken.
> Remember that it is NOT sufficient to set up the  mmeory  controller,
> you must also intialize the SDRAM chips themself.
>
> Best regards,
>
> Wolfgang Denk
>
> --
> Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
> Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
> "What is wanted is not the will to believe, but the will to find out,
> which is the exact opposite." - Bertrand Russell, _Sceptical_Essays_,
> 1928
>
>
> ** Sent via the linuxppc-embedded mail list. See
http://lists.linuxppc.org/
>





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