[U-Boot-Users] BUBINGA405EP Platform

Taian Su tsu at bermai.com
Tue Dec 9 03:14:13 CET 2003


Bruce,

The problem may be caused by the CPU core reset within "pll_wait", which was from IBM's referenc code, I found it would cause system crashed.

Below is the modified code blocking the reset, which seems working fine.

Best regards,
 Taian

---------------------------------------------------------------------------------------------------------------------------

/*
        ! Wait min of 100us for PLL to lock.
        ! See CMOS 27E databook for more info.
        ! At 200MHz, that means waiting 20,000 instructions
		 */
        addi    r3,0,20000              /* 2000 = 0x4e20 */
        mtctr   r3
pll_wait:
        bdnz    pll_wait

	  andis.	r3, r3, 0x0		   /* to clear PCI reset bit */	
	  mtdcr	CPC0_SRR, r3		

        oris   r5,r5,0x8000             /* Enable PLL */
        mtdcr   CPC0_PLLMR1,r5          /* Engage */
	  blr;				    /*no reset*/
        /*
         * Reset CPU to guarantee timings are OK
         * Not sure if this is needed...
 	 */
#if 0
        addis r3,0,0x1000
        mtspr dbcr0,r3               /* This will cause a CPU core reset, and */
                                     /* execution will continue from the poweron */
                                     /* vector of 0xfffffffc */
#endif
#endif /* CONFIG_405EP */

-----Original Message-----
From: Bruce Boettjer [mailto:bruceb at momenco.com]
Sent: Monday, December 08, 2003 5:10 PM
To: u-boot-users at lists.sourceforge.net
Subject: [U-Boot-Users] BUBINGA405EP Platform


It's me, again...

I have a bubinga 405 reference platform, and it behaves very well with the
PROM from IBM, but I am unable to get u-boot running on it.

It takes an exception to either 0700 or 0200 after executing very early in
the bootloader.  The ppc405ep_init function just starts, and actually causes
a machine exception on the 5th assy line... andi. R6,r5,8  which looks
completely valid to me...  At this point in the game, icache and dcache have
been invalidated, and not much else has been done.

If someone has worked with the RISCwatch on this board, would you please
send me your startup.cmd file?

Any ideas would be welcome... 

Regards,
 
Bruce Boettjer
Sr Hardware Design Engineer
Momentum Computer
1815 Aston Ave
Suite 107
Carlsbad, CA  92008
(760)-431-8663





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