[U-Boot-Users] Patch: New PowerQUICC II processors support

[Wolfgang Denk]

Dear Yuli,

in message <16145.41146.788955.326503 at gargle.gargle.HOWL> you wrote:
> 
> Latest additions to PowerQUICC II family (8270/8275/8280) have got
> different PVR values and different clock generation scheme. This patch
> adds support for these processors.
...
> diff -purN CVS/cpu/mpc8260/speed.c Arabella/cpu/mpc8260/speed.c
> --- CVS/cpu/mpc8260/speed.c	2003-07-13 20:51:15.000000000 +0300
> +++ Arabella/cpu/mpc8260/speed.c	2003-07-13 17:27:30.000000000 +0300
> @@ -120,15 +120,19 @@ int get_clocks (void)
>  
>  	scmr = immap->im_clkrst.car_scmr;
>  	corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT;
> -	busdf = (scmr & SCMR_BUSDF_MSK) >> SCMR_BUSDF_SHIFT;
> -	cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT;
> -	plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
> -	pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
> -
>  	cp = &corecnf_tab[corecnf];
>  
> -	gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
> +	busdf = (scmr & SCMR_BUSDF_MSK) >> SCMR_BUSDF_SHIFT;
> +	cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT;
>  
> +	if (get_pvr () == PVR_8260_HIP7) { /* HiP7 */
> +		pllmf = (scmr & SCMR_PLLMF_MSKH7) >> SCMR_PLLMF_SHIFT;
                                ^^^^^^^^^^^^^^^^

SCMR_PLLMF_MSKH7 is nowhere defined. It seems some part of your patch
is missing?

Best regards,

Wolfgang Denk

-- 
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