[U-Boot-Users] [PATCH] 4/5: innokom update
Robert Schwebel
robert at schwebel.de
Mon Mar 31 11:33:37 CEST 2003
innokom:
- innokom.c cleanup
- MDREFR fix in memsetup.S
- configuration update
Robert
--
Dipl.-Ing. Robert Schwebel | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
Braunschweiger Str. 79, 31134 Hildesheim, Germany
Handelsregister: Amtsgericht Hildesheim, HRA 2686
Phone: +49-5121-28619-0 | Fax: +49-5121-28619-4
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diff -x CVS -x ptx-patches -urN u-boot/board/innokom/innokom.c u-boot-ptx/board/innokom/innokom.c
--- u-boot/board/innokom/innokom.c 2003-03-31 08:33:51.000000000 +0200
+++ u-boot-ptx/board/innokom/innokom.c 2003-03-31 10:00:37.000000000 +0200
@@ -48,7 +48,7 @@
icr = ICR; ICR &= ~(ICR_SCLE | ICR_IUE);
/* set gpio pin low _before_ we change direction to output */
- GPCR(70) = GPIO_bit(70);
+ GPCR(70) = GPIO_bit(70);
/* now toggle between output=low and high-impedance */
for (i = 0; i < 20; i++) {
@@ -100,13 +100,8 @@
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
- /* arch number of Innokom board */
gd->bd->bi_arch_number = MACH_TYPE_INNOKOM;
-
- /* adress of boot parameters */
gd->bd->bi_boot_params = 0xa0000100;
-
- /* baud rate */
gd->bd->bi_baudrate = CONFIG_BAUDRATE;
return 0;
diff -x CVS -x ptx-patches -urN u-boot/board/innokom/memsetup.S u-boot-ptx/board/innokom/memsetup.S
--- u-boot/board/innokom/memsetup.S 2003-03-06 16:53:37.000000000 +0100
+++ u-boot-ptx/board/innokom/memsetup.S 2003-03-31 10:12:20.000000000 +0200
@@ -237,17 +237,16 @@
/* ---------------------------------------------------------------- */
/* Before accessing MDREFR we need a valid DRI field, so we set */
- /* this to power on defaults + DIR field. */
+ /* this to power on defaults + DRI field. */
- ldr r4, =0x03ca4fff
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
+ ldr r3, =CFG_MDREFR_VAL
+ ldr r2, =0xFFF
+ and r3, r3, r2
+ ldr r4, =0x03ca4000
+ orr r4, r4, r3
- ldr r4, =0x03ca4030
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Note: preserve the mdrefr value in r4 */
+ ldr r4, [r1, #MDREFR_OFFSET]
/* ---------------------------------------------------------------- */
@@ -267,18 +266,16 @@
/* Step 4: Initialize SDRAM */
/* ---------------------------------------------------------------- */
- /* Step 4a: assert MDREFR:K1RUN and MDREFR:K2RUN and configure */
+ /* Step 4a: assert MDREFR:K?RUN and configure */
/* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */
- orr r4, r4, #(MDREFR_K1RUN|MDREFR_K0RUN)
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
+ ldr r4, =CFG_MDREFR_VAL
+ str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
+ ldr r4, [r1, #MDREFR_OFFSET]
/* Step 4b: de-assert MDREFR:SLFRSH. */
- bic r4, r4, #(MDREFR_SLFRSH)
+ bic r4, r4, #(MDREFR_SLFRSH)
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
ldr r4, [r1, #MDREFR_OFFSET]
diff -x CVS -x ptx-patches -urN u-boot/include/configs/innokom.h u-boot-ptx/include/configs/innokom.h
--- u-boot/include/configs/innokom.h 2003-03-18 19:52:19.000000000 +0100
+++ u-boot-ptx/include/configs/innokom.h 2003-03-31 10:59:38.000000000 +0200
@@ -62,7 +62,8 @@
#define CONFIG_BAUDRATE 19200
#define CONFIG_MISC_INIT_R 1 /* we have a misc_init_r() function */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL|CFG_CMD_I2C|CFG_CMD_EEPROM|CFG_CMD_NET|CFG_CMD_JFFS2|CFG_CMD_DHCP)
+#define CONFIG_COMMANDS (CFG_CMD_BDI|CFG_CMD_LOADB|CFG_CMD_IMI|CFG_CMD_FLASH|CFG_CMD_MEMORY|CFG_CMD_NET|CFG_CMD_ENV|CFG_CMD_RUN|CFG_CMD_ASKENV|CFG_CMD_ECHO|CFG_CMD_I2C|CFG_CMD_DHCP)
+/* CONFIG_CMD_DFL|CFG_CMD_I2C|CFG_CMD_EEPROM|CFG_CMD_NET|CFG_CMD_JFFS2|CFG_CMD_DHCP) */
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
@@ -78,11 +79,6 @@
#define CONFIG_CMDLINE_TAG 1
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
-#endif
-
/*
* Miscellaneous configurable options
*/
@@ -186,7 +182,7 @@
/*
- * GPIO settings; see BDI2000 config file for details
+ * GPIO settings
*
* GP15 == nCS1 is 1
* GP24 == SFRM is 1
@@ -391,7 +387,7 @@
* [32:26] 0 - reserved
* [25] 0 - K2FREE: not free running
* [24] 0 - K1FREE: not free running
- * [23] 0 - K0FREE: not free running
+ * [23] 1 - K0FREE: not free running
* [22] 0 - SLFRSH: self refresh disabled
* [21] 0 - reserved
* [20] 0 - APD: no auto power down
@@ -401,11 +397,11 @@
* [16] 1 - K1RUN: enable SDCLK1
* [15] 1 - E1PIN: SDRAM clock enable
* [14] 1 - K0DB2: SDCLK0 is MemClk
- * [13] 1 - K0RUN: disable SDCLK0
+ * [13] 0 - K0RUN: disable SDCLK0
* [12] 1 - E0PIN: disable SDCKE0
* [11:00] 000000011000 - (64ms/8192)*MemClkFreq/32 = 24
*/
-#define CFG_MDREFR_VAL 0x0001F018
+#define CFG_MDREFR_VAL 0x0081D018
/* MDMRS: Mode Register Set Configuration Register
*
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