[U-Boot-Users] uboot compatible 8266 BDI cfg

Allen Curtis acurtis at onz.com
Thu Sep 18 16:47:18 CEST 2003


This matches the uboot memory configuration.
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; bdiGDB configuration file for MPC8260-ADS board
; -----------------------------------------------
;
[INIT]
; init core register
WREG    MSR             0x00000000      ;clear MSR
WM32	0x0F0101A8	0xF0000000	;IMMR : internal space @ 0xF0000000
WM32	0xF0010004	0xFFFFFFC3	;SYPCR: disable watchdog
WM32	0xF0010C80	0x00000001	;SCCR : normal operation

; init memory controller
WM32	0xF0010104	0xFE000836	;OR0: Flash 32MB, CS early negate, 6 w.s., Timing relax
					; Address wrapping will put reset @ 0xFFF00100 all cases
WM32	0xF0010100	0xFE001801	;BR0: Flash @0xFE000000, 32bit, no parity
WM32	0xF001010C	0xFFFF8010	;OR1: BCSR 32KB, all types accesse, 1 w.s.
WM32	0xF0010108	0xF8001801	;BR1: BCSR @0xF8000000, 32bit, no parity
WM32	0xF8000004	0xB5000000	;BCSR1: enable RS232-1 and Ethernet
WM32	0xF0010124	0xFFFF8010	;OR4: EEPROM 32KB, all types accesse, 1 w.s.
WM32	0xF0010120	0xF8301801	;BR4: EEPROM @0xF8300000, 32bit, no parity
WM32	0xF001012C	0xFFFF8010	;OR5: ATM UNI 32KB, all types accesse, 1 w.s.
WM32	0xF0010128	0xF8101801	;BR5: ATM UNI @0xF8100000, 32bit, no parity
WM32	0xF0010144	0xFFFF8010	;OR8: PCI INT 32KB, all types accesse, 1 w.s.
WM32	0xF0010140	0xF8201801	;BR8: PCI INT @0xF8200000, 32bit, no parity

; init SDRAM Init (PPC bus)
WM16	0xF0010184	0x1900	        ;MPTPR: Divide Bus clock by 26
WM8	0xF001019C	0x21	        ;PSRT : Divide MPTPR output by 34
WM32	0xF0010114	0xFF000C80	;OR2  : 16MB, 2 banks, row start at A9, 11 rows
WM32	0xF0010110	0x00000041	;BR2  : SDRAM @0x00000000, 64bit, no parity
WM32	0xF0010190	0x296EB452	;PSDMR: Precharge all banks
WM8	0x00000000	0xFF	        ;Access SDRAM
WM32	0xF0010190	0x096EB452	;PSDMR: CBR Refresh
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM32	0xF0010190	0x196EB452	;PSDMR: Mode Set
WM8	0x00000000	0xFF	        ;Access SDRAM
WM32	0xF0010190	0x416EB452	;PSDMR: enable refresh, normal operation


[TARGET]
CPUTYPE     8260        ;the CPU type (603EV,750,8240,8260)
JTAGCLOCK   0           ;use 16 MHz JTAG clock
BOOTADDR    0xfff00100  ;boot address used for start-up break
WORKSPACE   0x00000000	;workspace in target RAM for fast download
BDIMODE     AGENT     	;the BDI working mode (LOADONLY | AGENT | GATEWAY)
BREAKMODE   SOFT      	;SOFT or HARD, HARD uses PPC hardware breakpoints
;STEPMODE    HWBP        ;TRACE or HWBP, HWPB uses a hardware breakpoint
VECTOR      CATCH       ;catch unhandled exceptions
DCACHE      NOFLUSH	;data cache flushing (FLUSH | NOFLUSH)
;MMU         XLAT        ;translate effective to physical address
POWERUP     5000        ;start delay after power-up detected in ms
;REGLIST     SPR         ;select register to transfer to GDB
;REGLIST     ALL         ;select register to transfer to GDB
;VIO         7 9600       ;TCP port for virtual IO, BCSR1: enable RS232-1 !!!
;SIO         7 9600       ;TCP port for serial IO, check BCSR1: enable RS232-1 !!!

[HOST]
IP          191.1.1.105
FILE        E:\cygnus\root\usr\demo\mpc8260\vxworks
;FILE        E:\cygnus\root\usr\demo\mpc8260\fibo.exe
FORMAT      ELF
LOAD        MANUAL      ;load code MANUAL or AUTO after reset
DEBUGPORT   2001
PROMPT      MPC8266>	;new prompt for Telnet
;DUMP        E:\temp\dump.bin
DUMP        dump.bin            ;Linux: dump.bin must already exist and public writable

[FLASH]
CHIPTYPE    I28BX8      ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
;CHIPTYPE    AM29BX8
CHIPSIZE    0x200000    ;The size of one flash chip in bytes (e.g. AM29F010 = 0x20000)
BUSWIDTH    32          ;The width of the flash memory bus in bits (8 | 16 | 32 | 64)
;WORKSPACE   0x04700000  ;workspace in dual port RAM
WORKSPACE   0x00000000  ;workspace in SDRAM
;FILE        E:\tornado\target\config\ads8260\test.hex  ;The file to program
;FORMAT      SREC 0x01000000
;FILE        E:\cygnus\root\usr\demo\mpc8260\init8260.S3
FILE        E:\cygnus\root\usr\demo\mpc8260\ads8260.sss
;
ERASE       0xFE000000  ;erase sector  0 of flash SIMM (LH28F016SCT)
ERASE       0xFE040000  ;erase sector  1 of flash SIMM
ERASE       0xFE080000  ;erase sector  2 of flash SIMM
ERASE       0xFE0C0000  ;erase sector  3 of flash SIMM
ERASE       0xFE100000  ;erase sector  4 of flash SIMM
ERASE       0xFE140000  ;erase sector  5 of flash SIMM
ERASE       0xFE180000  ;erase sector  6 of flash SIMM
ERASE       0xFE1C0000  ;erase sector  7 of flash SIMM
ERASE       0xFE200000  ;erase sector  8 of flash SIMM
ERASE       0xFE240000  ;erase sector  9 of flash SIMM
ERASE       0xFE280000  ;erase sector 10 of flash SIMM
ERASE       0xFE2C0000  ;erase sector 11 of flash SIMM
ERASE       0xFE300000  ;erase sector 12 of flash SIMM
ERASE       0xFE340000  ;erase sector 13 of flash SIMM
ERASE       0xFE380000  ;erase sector 14 of flash SIMM
ERASE       0xFE3C0000  ;erase sector 15 of flash SIMM
ERASE       0xFE400000  ;erase sector 16 of flash SIMM
ERASE       0xFE440000  ;erase sector 17 of flash SIMM
ERASE       0xFE480000  ;erase sector 18 of flash SIMM
ERASE       0xFE4C0000  ;erase sector 19 of flash SIMM
ERASE       0xFE500000  ;erase sector 20 of flash SIMM
ERASE       0xFE540000  ;erase sector 21 of flash SIMM
ERASE       0xFE580000  ;erase sector 22 of flash SIMM
ERASE       0xFE5C0000  ;erase sector 23 of flash SIMM
ERASE       0xFE600000  ;erase sector 24 of flash SIMM
ERASE       0xFE640000  ;erase sector 25 of flash SIMM
ERASE       0xFE680000  ;erase sector 26 of flash SIMM
ERASE       0xFE6C0000  ;erase sector 27 of flash SIMM
ERASE       0xFE700000  ;erase sector 28 of flash SIMM
ERASE       0xFE740000  ;erase sector 29 of flash SIMM
ERASE       0xFE780000  ;erase sector 30 of flash SIMM
ERASE       0xFE7C0000  ;erase sector 31 of flash SIMM

[REGS]
DMM1        0xF0000000
FILE        /bdi2000/reg8260.def

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