[U-Boot-Users] U-boot - odd errors in memsetup

[David Snowdon]

G'Day U-boot users,

I'm trying to get U-boot going on a custom built board based on the 
PXA255. Unfortunately, I'm having a few problems, and got to the 
if(clueless){ send email to mailing list } part of the porting to a new 
board sequence. :-).

I'm stepping through the code using a Multi-ICE, and am able to 
reliably read the flash, downloading the entire program, etc, so I'm 
fairly certain that the flash is hooked up and working ok. I can also 
disassemble this using arm-linux-objdump, and get some sane-looking 
output (1st 1000 lines clagged below).

Now, what's odd is that when I'm stepping through the code, it seems to 
work pretty well up until the point (at address 0x550) where it loads a 
particular register's address into R3 (e.g. ldr r3,0x00000744). It 
seems to load the top 16 bits without any worries, but the bottom 16 
bits are FFFF (rather than the bottom half of the address of the OS 
counter register).

I had a quick look back at what it does when its setting up the GPIO 
registers, and it seems that it happens sporadically while its doing 
any ldr instruction. It doesn't seem to be correlated with the address, 
and looking at the disassembly, the correct values are being read by 
the processor.

Is there anything different that the ldr instruction would do (as 
opposed to when I'm reading it out with multi-ice?) that might cause 
this effect?

Before I noticed this problem, I was getting prefetch faults, and 
unknown instruction exceptions on a mov instruction (hence the addition 
of the nops at 0x56c to see whether it was dependent on the address - 
the addition of the nops caused the code above it to break in the way I 
described above.

There exists the possibility that the processor has been killed by ESD 
or something, but I thought I'd email you guys in a last ditch effort 
before I go about the rather arduous task of pulling off the BGA and 
place another one.

Any ideas? Any further information that I can provide that might shed 
some light on the situation? I've attached the memsetup.S file that all 
this is generated from (from address 0x444 onward).

Many thanks in advance,

Dave.


-
David Snowdon
PhD Student
National ICT Australia (NICTA)
Phone: 9385 7355
Email: daves at cse.unsw.edu.au


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-
David Snowdon
PhD Student
National ICT Australia (NICTA)
Phone: 9385 7355
Email: daves at cse.unsw.edu.au