[U-Boot-Users] Pci multi bridge bug

Travis Sawyer tsawyer+u-boot at sandburst.com
Thu Feb 5 14:34:00 CET 2004


Philippe:

I sent in a patch for this a couple of weeks ago (2 weeks?).

Search the archives for:
sibling p2p bridge

I'm sure its in Wolfgang's Q for cvs...

-travis

On Thu, 2004-02-05 at 04:03, Philippe Simal wrote:
> Hello,
> 
> I'm running u-boot-1.0.0 on a IBM PPC440GP.
> I have a custom made board with 2 pci-to-pci bridge Intel 21154BE and
> several devices behind it. (* PCI bus layout)
> On boot-up, u-boot immediately recognizes the 2 bridges and 1 device on bus
> 0.
> It also has no problem for enumirating all the devices on bus 1, but u-boot
> can't find any device on bus 2.
> When I look at the bridge configuration using the 'pci 0 long' command, I
> see that the secondary bus address field of bridge 1 is set to 1.
> This should be 2. I also see that on bridge 1 but also on bridge 0 the
> subordinate bus address field always is filled with a 0.
> 
> First of all I already implemented the type1 configuration cycle bug fix at
> (..\drivers\Pci_indirect.c).
> 
> To work this kind of PCI configuration, I changed the following lines:
> 1. The problem with the secondary bus address is fixed by changing
>      pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus + 1);
>     to
>     pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS,
> hose->current_busno);
>     in
>    (file: '..\drivers\Pci_auto.c';   function: 'static void
> pciauto_prescan_setup_bridge())
> 2. The problem with the subordinate bus address is solved by swapping the
> code lines from
>      pciauto_postscan_setup_bridge(hose, dev, sub_bus);
>      sub_bus = hose->current_busno;
>      to
>      sub_bus = hose->current_busno;
>      pciauto_postscan_setup_bridge(hose, dev, sub_bus);
>     (file: '..\drivers\Pci_auto.c';   function: int pciauto_config_device())
> 
> I'm not sure if this fix is fully failed proof but it works fine for this
> design.
> 
> I hope my findings can be a contribution to the u-boot project.
> 
> * PCI bus layout.
> 
>    BUS0
>          |
>          |
>          |     /-------\  BUS1
>          |---|            |--------       -> 7 PCI devices
>          |     \-------/
>          |   Bridge 0
>          |
>          |
>          |     /-------\  BUS2
>          |---|            |--------     -> 7 PCI devices
>          |     \-------/
>          |   Bridge 1
>          |
>          |
>          |--- 1 PCI device
> 
> Greetings,
> Philippe
> 
> 
> 
> 
> 
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