[U-Boot-Users] U-Boot Not Loading Successfully

[Jeff Stevens]

Sam,
    I'm not sure what reset vector is.  I am assuming
 that you are talking about CFG_RESET_ADDRESS, which
 I
 have set to 0x80000000.  I'm not sure exactly what
 to
 set that to, since some board configuration files
 tell
 you to set it to a known invalid address, and then
 some have it set to flash base plus 0x100.  Also,
 the
 speed of the flash I am using is a 70ns flash
 device.
 
 Thanks for the help!

> 
> --- SAM SONG <samsongshu at yahoo.com.cn> wrote:
> > Date: Wed, 31 Dec 2003 13:21:29 -0800 (PST)
> > From: Jeff Stevens <jsteve17 at yahoo.com>
> > To: u-boot-users at lists.sourceforge.net
> > Subject: [U-Boot-Users] U-Boot Not Loading
> > Successfully
> > 
> > 
> > I am porting U-Boot over to a new product and am
> > having some difficulty getting U-Boot to load
> > successfully.  I have placed our board on a logic
> > analyzer and found (based on System.map) that
> U-Boot
> > seems to crash in cpu/mpc8xx/cpu_init.c in
> function
> > cpu_init_f at lines:
> > 
> > memctl->memc_br0 = CFG_BR0_PRELIM;
> > memctl->memc_or0 = CFG_OR0_PRELIM;
> > 
> > Here is my board configuration:
> > CPU:   MPC855T
> > FLASH: AMD AM29LV040B (512kB 8-bit on CS0)
> > SDRAM: Micron MT48LC4M32 (16MB 32-bit on CS2)
> > NVRAM: Simtek STK14C88 (32kB 8-bit on CS4)
> > 
> > The board is set to have the IMMR come up at
> > 0xFF000000 (on hard reset), and that is what I
> have
> > CFG_IMMR set to in my board configuration file. 
> > Could
> > this be a problem with the placement of the IMMR. 
> I
> > previously had the IMMR at 0x00000000 on hard
> reset
> > and then moved it to 0xFA200000 with CFG_IMMR,
> which
> > had the same effect.  Or, could this be an issue
> > with
> > my BR0 and OR0 settings? 
> > 
> >
> ---------------------------------------------------
> > Both settings on CFG_IMMR are OK.Only you set
> > CFG_IMMR
> > on 0xFFF80000 would have some problems.I guess
> your
> > trouble don't relate with CFG_IMMR settings.
> >
> ---------------------------------------------------
> > 
> >  I read something in that
> > file before those two lines above, which talked
> > about
> > CFG_OR0_REMAP, but didn't quite understand it. 
> > Should
> > I be using this?
> > 
> > Here are my BRx, ORx settings:
> > #define FLASH_BASE_PRELIM     0xFFF80000
> > #define CFG_PRELIM_OR_AM      0xFFFF0000
> > #define CFG_OR_TIMING_FLASH   (OR_CSNT_SAM |
> > OR_ACS_DIV4 | OR_BI | OR_SCY_3_CLK | OR_TRLX |
> > OR_EHTR)
> > 
> > -----------------------------------------------
> > Pls tell us the FLASH SPEED or we cannot check the
> > OR0
> > configuration for you.Meanwhile,what's your reset
> > vector prefix?0x0000 or 0xfff0?
> > ------------------------------------------------
> > 
> > #define CFG_OR0_PRELIM	      (CFG_PRELIM_OR_AM |
> > CFG_OR_TIMING_FLASH)
> > #define CFG_BR0_PRELIM	      ((FLASH_BASE_PRELIM &
> > BR_BA_MSK) | (BR_PS_8 & BR_PS_MSK) | BR_V)
> > 
> > 
> > #define SDRAM_BASE_PRELIM     0x00000000
> > #define SDRAM_MAX_SIZE        0x01000000
> > 
> > #define CFG_OR_TIMING_SDRAM   (OR_G5LA | OR_G5LS)
> > #define CFG_OR2_PRELIM        (CFG_PRELIM_OR_AM |
> > CFG_OR_TIMING_SDRAM )
> > #define CFG_BR2_PRELIM        ((SDRAM_BASE_PRELIM
> &
> > BR_BA_MSK) | BR_MS_UPMA | BR_V )
> > 
> > #define CFG_NVRAM_BASE        0xFA000000
> > #define CFG_OR4_PRELIM        (CFG_PRELIM_OR_AM |
> > CFG_OR_TIMING_FLASH)
> > #define CFG_BR4_PRELIM        ((CFG_NVRAM_BASE &
> > BR_BA_MSK) | (BR_PS_8 & BR_PS_MSK) | BR_V |
> OR_EHTR)
> > 
> > I would appreciate anyones input, since I'm not
> too
> > familiar with the U-Boot beyond the board specific
> > files.
> > 
> > Thanks in advance!
> > 
> > ------------------------------------------
> > 
> > Best regards,
> > 
> > SAM
> > 
> > 
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