[U-Boot-Users] Fwd: PPC405H ethernet receive problems

Ryan Harkin omnium at ziplip.com
Thu Jan 29 16:24:47 CET 2004


OK, sorry about sending my message to the list without enough research into my problem.  I have just found out that the Interrupt controller on the NP405H is a bit like a hybrid between the one for CONFIG_440 and the generic 405.

405ep seems to have only one UIC, 405h has UIC0 and UIC1.

I also forgot to mention that I am using u-boot-1.0.0 with no patches , just my own mods.

I notice that there is an ASH405.h in include/configs.  This does not set CONFIG_440 and doesn't seem to change the interrupt vectors at all.  Does anyone here know anything about this port?  Or has anyone else encountered the same interrupt controller issue as I have?

I am in the process of modofying the interrupt code now, but if there are patches for this the I would be very interested in seeing them.

Cheers,
Ryan.




> -----Original Message-----
> From: omnium at ziplip.com [mailto:omnium at ziplip.com]
> Sent: Thursday, January 29, 2004, 4:49 AM
> To: u-boot-users at lists.sourceforge.net
> Subject: PPC405H ethernet receive problems
> 
> Hi, I'm new!
> 
> I am porting u-boot to a custom board with a NP405H processor and an Intel
> LXT973 dual phy.
> 
> I have had a lot of success so far:  I have brought the board up and can boot
> the kernel (without networking).
> 
> My network setup is different to the standard eval boards such as the IBM Ash
> board.  I am using MII to talk to the phy with EMAC0 and 2, the ASH uses RMII.
> Currently I am only trying to support EMAC0 and ignore EMAC2.
> 
> So far, the only mod I have made to cpu/ppc4xx/405gp_enet.c is to add to the
> start of ppc_4xx_eth_init:
> 
>     out32 (ZMII_FER, ZMII_MDI0 | ZMII_MII0 | ZMII_MII2);
>     out32 (ZMII_SSR, 0x55550000);
> 
> (this is just before the "/* EMAC RESET */" comment).  This should place my
> cpu into MII mode at the correct speed for my test network.
> 
> I can transmit bootp requests and I can send out ARP requests as part of a
> ping.  I verified this using Ethereal on my Linux host.
> 
> My problem is reception.  I see nothing!  The receive LED blinks on the PHY
> and Ethereal shows DHCP_OFFER messages in response to the request or ARP
> messages in response to a ping.
> 
> Debugging using a Lauterbach (sorry, it's not a BDI2000!) shows that I never
> get a breakpoint on "enetInt" and therefore never receive any packets.
> 
> Unfortunately, I am fairly clueless when it comes to this chip and ethernet in
> general and hope that someone could point out some likely problems.
> 
> I have tested reception on the EMAC using some hardware test software written
> by a colleague, so I know that it CAN receive data.  However, this program
> polls the EMAC rather than uses interrupts to receive data.
> 
> I suspect that using MII rather than RMII may be a clue, but don't know where
> to proceed.
> 
> Any help would be appreciated.  Please excuse me if I've missed any obvious
> details.
> 
> Many thanks,
> Ryan Harkin.




More information about the U-Boot mailing list