[U-Boot-Users] Interrupt for Ethernet.

Prathima_Kolar Prathima_Kolar at Satyam.com
Thu Nov 4 13:48:08 CET 2004


Hi all,
I am working on mpc8260ads reference board.
My ethernet is connected on FCC2.
I want to use IRQ7 for interrupt handling.
There is a file mpc8260_irq.h in Uboot which has " #define	SIU_INT_IRQ7
((uint)0x19) ".
There is also another file interrupt.c where it says -

/***************************************************************************
*/
/* this section was ripped out of arch/ppc/kernel/ppc8260_pic.c in the
*/
/* Linux/PPC 2.4.x source. There was no copyright notice in that file.
*/

/* The 8260 internal interrupt controller.  It is usually
 * the only interrupt controller.
 * There are two 32-bit registers (high/low) for up to 64
 * possible interrupts.
 *
 * Now, the fun starts.....Interrupt Numbers DO NOT MAP
 * in a simple arithmetic fashion to mask or pending registers.
 * That is, interrupt 4 does not map to bit position 4.
 * We create two tables, indexed by vector number, to indicate
 * which register to use and which bit in the register to use.
 */
static u_char irq_to_siureg[] = {
	1, 1, 1, 1, 1, 1, 1, 1,
	1, 1, 1, 1, 1, 1, 1, 1,
	0, 0, 0, 0, 0, 0, 0, 0,
	0, 0, 0, 0, 0, 0, 0, 0,
	1, 1, 1, 1, 1, 1, 1, 1,
	1, 1, 1, 1, 1, 1, 1, 1,
	0, 0, 0, 0, 0, 0, 0, 0,
	0, 0, 0, 0, 0, 0, 0, 0
};

static u_char irq_to_siubit[] = {
	31, 16, 17, 18, 19, 20, 21, 22,
	23, 24, 25, 26, 27, 28, 29, 30,
	29, 30, 16, 17, 18, 19, 20, 21,
	22, 23, 24, 25, 26, 27, 28, 31,
	0, 1, 2, 3, 4, 5, 6, 7,
	8, 9, 10, 11, 12, 13, 14, 15,
	15, 14, 13, 12, 11, 10, 9, 8,
	7, 6, 5, 4, 3, 2, 1, 0
};

How are the IRQ numbers being mapped in the above arrays?
Please tell me how do i modify the code to use IRQ7 for handling ethernet
interrupts? Do i have to write a interrupt sub-routine in fec_init() in
ether_fcc.c under the comment "  /* 28.9 - (10-12): we don't use ethernet
interrupts */"?
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