[U-Boot-Users] ppc440gx

[Barbier, Renaud (GE Infrastructure)]

ok I think I found the problem I have with exception. It would appear that for some reason 
the vector 0x500 gets assigned the UnkownException handler instead of external_interrupt
when I look at the end label in memory.
The last two values are the same and will be the offset to UnknownException

488: 03fc3bc8
48c: 03fc319c

588: 03fc3bc8
58c: 03fc319c

Any idea what may be broken here.?





-----Original Message-----
From: u-boot-users-admin at lists.sourceforge.net
[mailto:u-boot-users-admin at lists.sourceforge.net]On Behalf Of Barbier,
Renaud (GE Infrastructure)
Sent: Friday, September 03, 2004 2:49 PM
To: Ralph Siemsen
Cc: u-boot-users at lists.sourceforge.net
Subject: RE: [U-Boot-Users] ppc440gx


that is what I am looking for but TSR and  TCR are always cleared. the interrupt should not come unless...

-----Original Message-----
From: u-boot-users-admin at lists.sourceforge.net
[mailto:u-boot-users-admin at lists.sourceforge.net]On Behalf Of Ralph
Siemsen
Sent: Friday, September 03, 2004 2:26 PM
To: Barbier, Renaud (GE Infrastructure)
Cc: u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] ppc440gx


Barbier, Renaud (GE Infrastructure) wrote:

> kgdb: handle_exception; trap [0xb00]
> 
> I am not sure what is the source of this exception. (decrementer should be 0x900)
> 
> Before that I was getting exception 0x500(external interrupt) and trace it to the UIC registers(polarity, trigger,...) being cleared (where?).
> So I restore their value in interrrupt_init_cpu.  

My numbers don't quite agree with yours... but I think you might be 
seeing "Fixed Interval Timer" as the source of the exception.  Sounds 
like you are enabling interrupts before the handlers have been registered.

Just a guess, probably others know better...
-Ralph


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