[U-Boot-Users] Software watchdog on mpc8247
Jerry Van Baren
gerald.vanbaren at smiths-aerospace.com
Thu Aug 25 14:51:12 CEST 2005
Mike Rapoport wrote:
> On 8/25/05, Jerry Van Baren <gerald.vanbaren at smiths-aerospace.com> wrote:
>
>>What did you set the SYPCR to (actual values, preferably from a
>>disassembly/dump)?
>
>
> Here's the output of "objdump -dS u-boot" :
> /* Initialise the SYPCR early, and reset the watchdog (if req) */
> /*--------------------------------------------------------------*/
>
> lis r3, (CFG_IMMR+IM_REGBASE)@h
> fff03198: 3c 60 f0 01 lis r3,-4095
> #if !defined(CONFIG_COGENT)
> lis r4, CFG_SYPCR at h
> fff0319c: 3c 80 ff ff lis r4,-1
> ori r4, r4, CFG_SYPCR at l
> fff031a0: 60 84 ff c3 ori r4,r4,65479
> stw r4, IM_SYPCR at l(r3)
> fff031a4: 90 83 00 04 stw r4,4(r3)
> #endif /* !CONFIG_COGENT */
> #if defined(CONFIG_WATCHDOG)
> li r4, 21868 /* = 0x556c */
> sth r4, IM_SWSR at l(r3)
> li r4, -21959 /* = 0xaa39 */
> sth r4, IM_SWSR at l(r3)
>
> Actual SYPCR setting is 0xFFFFFFC7
> I verified that this code is executed.
>
> I've tried to add WATCHDOG_RESET() call in board_init_f just before
> the initialization sequence was run, but it didn't change anything.
>
>>What is your bus clock?
>
> 66MHz
>
>>What do you figure your timeout to be?
>
> 2 sec
>
>>Do you write to the SYPCR only once to set up the WDT
>>(only the first write to the SYPCR "works").
>
> Yes
Pointing out the obvious... looking at the disassembly, it isn't
enabling the watchdog (SWE). I'm guessing that you disassembled code
where you had the watchdog disabled?
I see you have PBME and LBME enabled (I'm looking at an 8260 manual,
assuming the 8247 is the same - feel free to correct me :-). Do you
have a 60x bus and a local bus? Is it possible you are having an
inadvertant bus error? This wouldn't explain why it only happens when
you enable the WDT, however. Puzzling.
gvb
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