[U-Boot-Users] IDE interface on PPC has endian issue

[Frank]

I had the same problem. It turns the idiot hardware engineer
decided he would do byte swapping in hardware without telling
me. To get around it, I just made the byte swapping code a noop
(no byte swaping) and it worked. 

--- Gregg <gnemas at gmail.com> wrote:

> I have a board that has a 128 MB compact flash connected to a
> PPC 440GP
> peripheral bus using True IDE mode. Up until now, I have been
> successfully
> booting using NFS, and now I am trying to get the IDE
> interface to work.
> 
> When I issue an IDE reset command to u-boot, the information
> returned is
> byte-swapped:
> 
> Device 0: Model: aSDnsi KDSFC-J21 8 Firm: DH X.272 Ser#: <...>
>           Type: Removeable Hard Disk
>           Capacity: 24576.1 MB = 24.0 GB (50331860 x 512)
> 
> Note that "aSDnsi K" is "SanDisk ". If I modify cmd_ide.c to
> pretend I am little
> endian so that the input_swap_data function is disabled (#if
> defined
> (__LITTLE_ENDIAN) version is used), I get seemingly correct
> results:
> 
> Device 0: Model: SanDisk SDCFJ-128 Firm: HDX 2.27 Ser#: <...>
>           Type: Removeable Hard Disk
>           Capacity: 122.5 MB = 0.1 GB (250880 x 512)
> 
> I am confused why I need to do this, as it seems wrong.
> Furthermore, although I
> can get the IDE information, I cannot see any partitions on
> the device. I
> created a single linux partion (type 83), but when I issue
> "ide part 0", I am
> told "IDE device 0 not available".
> 
> The CF is connected to the PPC like this:
> 
> A0,A1,A2 on the CF ==> A30, A29, A28 on 440GP
> D0..D15 on CF ==> D15..D0 on 440GP
> 
> I am using the following ATA configuration:
> 
> #define CFG_ATA_BASE_ADDR    0xa0300000
> #define CFG_IDE_MAXDEVICE    1
> #define CFG_IDE_MAXBUS       1
> #define CFG_ATA_IDE0_OFFFSET 0
> #define CFG_ATA_DATA_OFFSET  0
> #define CFG_ATA_REG_OFFSET   1
> #define CFG_ATA_ALT_OFFSET   0x00100001
> #define CFG_ATA_STRIDE       2
> #define ATA_RESET_TIME       5
> 
> Thanks.
> 
> Gregg
> 
> 
> 
> 
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