[U-Boot-Users] Re: [U-Boot-Users][Patch] Cleanup of arm920t/start.s

[Paolo Broggini]

Wolfgang Denk ha scritto:
>>Are there any particular reasons why this code should stay in start.S ?
> 
> 
> Never change a running system without need?
> 
Yeah, though not technical is an important one indeed ;-)
But since a SoC structure has been created I thought it was nice to have all the independent
files cleaned. Just give it a try! Anyway I'll fully understand if you prefer not to touch
a running system.

Best regards
-P.Broggini



Signed-off-by: Paolo Broggini <pbroggini at softool.ch>


CHANGELOG:
   Cleanup of cpu/arm920t/start.S, S3C24x0 specific code
   moved into boards depended lowlevel_init.s
   Affected boards: sdmk2400, sdmk2410, vcma9, trab
   Patch by Paolo Broggini, 13 Oct 2005


diff --git a/board/mpl/vcma9/lowlevel_init.S b/board/mpl/vcma9/lowlevel_init.S
--- a/board/mpl/vcma9/lowlevel_init.S
+++ b/board/mpl/vcma9/lowlevel_init.S
@@ -34,6 +34,10 @@

  /* some parameters for the board */

+#define pWTCON		0x53000000
+#define INTMSK		0x4A000008	/* Interupt-Controller base addresses */
+#define INTSUBMSK	0x4A00001C
+#define CLKDIVN	0x4C000014	/* clock divisor register */
  #define BWSCON		0x48000000
  #define PLD_BASE	0x2C000000
  #define SDRAM_REG	0x2C000106
@@ -132,6 +136,30 @@ _TEXT_BASE:

  .globl lowlevel_init
  lowlevel_init:
+
+	/*
+	 * Watchdog disable
+	 */
+	ldr     r0, =pWTCON
+	mov     r1, #0x0
+	str     r1, [r0]
+
+	/*
+	 * mask all IRQs by setting all bits in the INTMR - default
+	 */
+	mov	r1, #0xffffffff
+	ldr	r0, =INTMSK
+	str	r1, [r0]
+	ldr	r1, =0x3ff
+	ldr	r0, =INTSUBMSK
+	str	r1, [r0]
+
+	/* FCLK:HCLK:PCLK = 1:2:4 */
+	/* default FCLK is 120 MHz ! */
+	ldr	r0, =CLKDIVN
+	mov	r1, #3
+	str	r1, [r0]
+
  	/* memory control configuration */
  	/* make r0 relative the current location so that it */
  	/* reads SMRDATA out of FLASH rather than memory ! */
diff --git a/board/smdk2400/lowlevel_init.S b/board/smdk2400/lowlevel_init.S
--- a/board/smdk2400/lowlevel_init.S
+++ b/board/smdk2400/lowlevel_init.S
@@ -44,9 +44,13 @@
   *
   */

+#define pWTCON		0x15300000
+#define INTMSK		0x14400008	/* Interupt-Controller base addresses */
+#define CLKDIVN	0x14800014	/* clock divisor register */
+
  /* memory controller */
-#define BWSCON 0x14000000
-#define BANKCON3 0x14000010	/* for cs8900, ethernet */
+#define BWSCON		0x14000000
+#define BANKCON3 	0x14000010	/* for cs8900, ethernet */

  /* Bank0 */
  #define B0_Tacs	0x0	/* 0 clk */
@@ -127,6 +131,27 @@ _TEXT_BASE:

  .globl lowlevel_init
  lowlevel_init:
+
+	/*
+	 * Watchdog disable
+	 */
+	ldr     r0, =pWTCON
+	mov     r1, #0x0
+	str     r1, [r0]
+
+	/*
+	 * mask all IRQs by setting all bits in the INTMR - default
+	 */
+	mov	r1, #0xffffffff
+	ldr	r0, =INTMSK
+	str	r1, [r0]
+
+	/* FCLK:HCLK:PCLK = 1:2:4 */
+	/* default FCLK is 120 MHz ! */
+	ldr	r0, =CLKDIVN
+	mov	r1, #3
+	str	r1, [r0]
+
  	/* memory control configuration */
  	/* make r0 relative the current location so that it */
  	/* reads SMRDATA out of FLASH rather than memory ! */
diff --git a/board/smdk2410/lowlevel_init.S b/board/smdk2410/lowlevel_init.S
--- a/board/smdk2410/lowlevel_init.S
+++ b/board/smdk2410/lowlevel_init.S
@@ -42,7 +42,11 @@
   *
   */

-#define BWSCON	0x48000000
+#define pWTCON		0x53000000
+#define INTMSK		0x4A000008	/* Interupt-Controller base addresses */
+#define INTSUBMSK	0x4A00001C
+#define CLKDIVN	0x4C000014	/* clock divisor register */
+#define BWSCON		0x48000000

  /* BWSCON */
  #define DW8		 	(0x0)
@@ -131,6 +135,30 @@ _TEXT_BASE:

  .globl lowlevel_init
  lowlevel_init:
+
+	/*
+	 * Watchdog disable
+	 */
+	ldr     r0, =pWTCON
+	mov     r1, #0x0
+	str     r1, [r0]
+
+	/*
+	 * mask all IRQs by setting all bits in the INTMR - default
+	 */
+	mov	r1, #0xffffffff
+	ldr	r0, =INTMSK
+	str	r1, [r0]
+	ldr	r1, =0x3ff
+	ldr	r0, =INTSUBMSK
+	str	r1, [r0]
+
+	/* FCLK:HCLK:PCLK = 1:2:4 */
+	/* default FCLK is 120 MHz ! */
+	ldr	r0, =CLKDIVN
+	mov	r1, #3
+	str	r1, [r0]
+
  	/* memory control configuration */
  	/* make r0 relative the current location so that it */
  	/* reads SMRDATA out of FLASH rather than memory ! */
diff --git a/board/trab/lowlevel_init.S b/board/trab/lowlevel_init.S
--- a/board/trab/lowlevel_init.S
+++ b/board/trab/lowlevel_init.S
@@ -44,6 +44,10 @@
   *
   */

+#define pWTCON		0x15300000
+#define INTMSK		0x14400008	/* Interupt-Controller base addresses */
+#define CLKDIVN	0x14800014	/* clock divisor register */
+
  /* memory controller */
  #define BWSCON 0x14000000

@@ -142,6 +146,27 @@ _TEXT_BASE:

  .globl lowlevel_init
  lowlevel_init:
+
+	/*
+	 * Watchdog disable
+	 */
+	ldr     r0, =pWTCON
+	mov     r1, #0x0
+	str     r1, [r0]
+
+	/*
+	 * mask all IRQs by setting all bits in the INTMR - default
+	 */
+	mov	r1, #0xffffffff
+	ldr	r0, =INTMSK
+	str	r1, [r0]
+
+	/* FCLK:HCLK:PCLK = 1:2:4 */
+	/* default FCLK is 120 MHz ! */
+	ldr	r0, =CLKDIVN
+	mov	r1, #3
+	str	r1, [r0]
+
  	/* memory control configuration */
  	/* make r0 relative the current location so that it */
  	/* reads SMRDATA out of FLASH rather than memory ! */
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -1,8 +1,8 @@
  /*
   *  armboot - Startup Code for ARM920 CPU-core
   *
- *  Copyright (c) 2001	Marius Grger <mag at sysgo.de>
- *  Copyright (c) 2002	Alex Zpke <azu at sysgo.de>
+ *  Copyright (c) 2001	Marius Grger <mag at sysgo.de>
+ *  Copyright (c) 2002	Alex Zpke <azu at sysgo.de>
   *  Copyright (c) 2002	Gary Jennejohn <gj at denx.de>
   *
   * See file CREDITS for list of people who contributed to this
@@ -116,42 +116,6 @@ reset:
  	orr	r0,r0,#0xd3
  	msr	cpsr,r0

-/* turn off the watchdog */
-#if defined(CONFIG_S3C2400)
-# define pWTCON		0x15300000
-# define INTMSK		0x14400008	/* Interupt-Controller base addresses */
-# define CLKDIVN	0x14800014	/* clock divisor register */
-#elif defined(CONFIG_S3C2410)
-# define pWTCON		0x53000000
-# define INTMSK		0x4A000008	/* Interupt-Controller base addresses */
-# define INTSUBMSK	0x4A00001C
-# define CLKDIVN	0x4C000014	/* clock divisor register */
-#endif
-
-#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
-	ldr     r0, =pWTCON
-	mov     r1, #0x0
-	str     r1, [r0]
-
-	/*
-	 * mask all IRQs by setting all bits in the INTMR - default
-	 */
-	mov	r1, #0xffffffff
-	ldr	r0, =INTMSK
-	str	r1, [r0]
-# if defined(CONFIG_S3C2410)
-	ldr	r1, =0x3ff
-	ldr	r0, =INTSUBMSK
-	str	r1, [r0]
-# endif
-
-	/* FCLK:HCLK:PCLK = 1:2:4 */
-	/* default FCLK is 120 MHz ! */
-	ldr	r0, =CLKDIVN
-	mov	r1, #3
-	str	r1, [r0]
-#endif	/* CONFIG_S3C2400 || CONFIG_S3C2410 */
-
  	/*
  	 * we do sys-critical inits only at reboot,
  	 * not when booting from ram!