[U-Boot-Users] MPC8560 DDR controller

Murray.Jensen at csiro.au Murray.Jensen at csiro.au
Fri Sep 9 10:02:48 CEST 2005

Hi U-Boot Users, I noticed a patch go through CVS a few days ago which
updated the DDR DLL workaround for the tqm8560 and tqm8540 boards and it
piqued my interest - mainly because we are having trouble with the DDR
memory on our MPC8560 board.

I am interested in other people's experiences with the DDR controller
on their MPC8560 based boards - either positive or negative. Here is
our tail ...

It appears that noise internal to the processor is corrupting reads from
DDR memory (by causing the DDR DLL to drop out). We have played extensively
with the DDR configuration, following instructions in AN2583 (rev 2) and
the DDR11 errata, with some success - but I don't think we have ever been
able to completely eliminate the problem, only greatly reduce its frequency.

The things that seemed to help the most were setting the Reduced Drive
Strength extended operating mode in the DDR memory chips themselves, and
slowing the bus rate from 166MHz to 150Mhz. i.e. both of these really
have nothing to do with the processor's DDR controller, or any errata
workarounds, they obviously just combine to reduce noise on the bus.

Our processors are marked "PPC8560..." rather than "MPC8560.." and are
dated 0412 (week 12 of 2004 I believe ??). We were thinking that maybe
these were pre-production chips and it might help things if we replaced
them with "younger chips". By the way, I believe our chips are version

The board is currently usable for development, but would be unacceptable
for production use - but even in development, if you get a crash, you can't
really be sure if there was a real problem or whether the memory read
simply failed.

Does anyone have any experiences and/or advise they could share with us?
Thank you for listening. Cheers!
Murray Jensen, CSIRO Manufacturing & Infra. Tech.      Phone: +61 3 9662 7763
Locked Bag No. 9, Preston, Vic, 3072, Australia.         Fax: +61 3 9662 7853
Internet: Murray.Jensen at csiro.au

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