[U-Boot-Users] MPC8560 DDR controller

Murray.Jensen at csiro.au Murray.Jensen at csiro.au
Tue Sep 13 11:52:18 CEST 2005

On Fri, 09 Sep 2005 14:37:21 +0200, Clemens Koller writes:
>> I can't really rule out some problem in the Linux virtual memory system
>Oh, I wouldn't blame the kernel in that case. 2.6.8 to 2.6.13 work really
>fine over here. What linux do you use?

We are using 2.6.13, with some patches from the ozlabs patch tracker.

>If you would have the chance to have an ECCable
>system you can pretty easily check the reliability of the DDR looking at
>the ECC status registers.

Unfortunately, this would require a board re-design.

>There is a story around here (from a guy who did a DDR for MPC8540)
>that you might have to put on really good capacitors on some of the
>ddr vref voltages on the CPU side because something is bouncing there
>more than you would expect...

Thanks - we will take a look at them ...

>You also might want to check what happens if you increase/decrease
>supply voltages here and there... well... you know, all these EE tricks.

Your response is very much appreciated. Cheers!
Murray Jensen, CSIRO Manufacturing & Infra. Tech.      Phone: +61 3 9662 7763
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