[U-Boot-Users] u-boot 834x spd_ram

[Meszaros, Lajos]

On Apr 17, 2006, at 6:09 PM, Aziz Mzili wrote:

>
> Hi
>
> I'm wondering why in cpu/83xx/spd_ram.c we expect the DDR ram to be  
> on cs2 and cs3. Is there any issue with it on cs0 and cs1 ?

These processors start after reset in memory controlled
by CS0. There should be nonvolatile - readonly - memory
(generally flash). Very few board use CS0 for RAM, they have 
special hardware to "steal in" the flash to this address range.

    Ludwig