[U-Boot-Users] [PATCH 05/08]: mpc7448hpc2 board flash support

Zang Roy-r61911 tie-fei.zang at freescale.com
Thu Aug 3 11:33:18 CEST 2006


> > 
> > > FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB
> > > 16 MB
> > ...
> > > => fli
> > > 
> > > Bank # 1: CFI conformant FLASH (32 x 16)  Size: 16 MB in 
> > 128 Sectors  
> > > Erase timeout 16384 ms, write timeout 1 ms, buffer write 
> > timeout 5 ms, 
> > > buffer size 32
> > 
> > Stop. What's this. First we see a report of "Unknown  FLASH  
> > on  Bank 1",  and  that  the size has been set to 0, and here 
> > we get different information?
> 
> That first "Bank1 " is not this "Bank #1".  this "BANK #1"  
> should refer
> the Bank index 0. 
> It might be a bug in u-boot. Please compare the following code in
> u-boot.
> 
> in file cfi_flash.c :
> unsigned long flash_init (void)
> {
> ...
> 	/* Init: no FLASHes known */
> 	for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
> 		flash_info[i].flash_id = FLASH_UNKNOWN;
> 		size += flash_info[i].size = flash_get_size
> (bank_base[i], i);
> 		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
> #ifndef CFG_FLASH_QUIET_TEST
> 			printf ("## Unknown FLASH on Bank %d - Size =
> 0x%08lx = %ld MB\n",
> 				i, flash_info[i].size,
> flash_info[i].size << 20);
> #endif /* CFG_FLASH_QUIET_TEST */
>  ...
> The index start from 0.
> 
> in file cmd_flash.c
> int do_flinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> {
> ...
> 	if (argc == 1) {	/* print info for all FLASH banks */
> 		for (bank=0; bank <CFG_MAX_FLASH_BANKS; ++bank) {
> 			printf ("\nBank # %ld: ", bank+1);
> 
> 			flash_print_info (&flash_info[bank]);
> 		}
> 		return 0;
> 	}
> ...
> the print information start from bank+1.
> 
> Should they be unified?

How about this?

> 
> > 
> > >   Sector Start Addresses:
> > >     FF000000      FF020000      FF040000      FF060000    
>   FF080000
> > ...
> > >     FFFA0000      FFFC0000      FFFE0000
> > > 
> > > Bank # 2: missing or unknown FLASH type
> > 
> > And what's this about Bank # 2???
> > 
> > This seems to be a bug. Please fix this first.
> 
> It is not a bug. This "Bank #2 " refer to the previous "## 
> Unknown FLASH
> on Bank 1". 
> This device is a flash emulator (PromJet) on my board. If you are
> unhappy with this 
> information, I can remove it by setting my CFG_MAX_FLASH_BANKS to 1.
> 
> > 
> > 
> > > => md ff000000
> > > ff000000: 27051956 552d426f 6f742031 2e312e34    '..VU-Boot 1.1.4
> > > ff000010: 2d673230 38653063 38312d64 69727479    -g208e0c81-dirty
> > ...
> > > => cp.b ff000000 fff80000 20000
> > > Copy to Flash... done
> > 
> > So you are copying some area within the *same*  memory  
> > device  (your flash memory)...
> > 
> > > => md fff80000
> > > fff80000: 56190527 6f422d55 3120746f 342e312e    V..'oB-U1 to4.1.
> > > fff80010: 3032672d 63306538 642d3138 79747269    02g-c0e8d-18ytri
> > 
> > You read from memory, write to the same memory device, and  
> > read  the written  data  back from the same memory device, 
> > and find the data to be swapped?
> 
> Sure!
> 
> > 
> > That would mean that reading and writing memory  use  
> > different  byte order. If this is true, then you're screwed.
> > 
> 
> Sorry. I do not touch alcohol  these days :). it is the same phenomena
> copying 
> data from  DDR ram to flash. 
> The only modification I do is introducing a define 
> __LITTLE_ENDIAN in file cfi_flash.c. Just as I said, If I 
> define CFG_FLASH_USE_BUFFER_WRITE , it will
> be OK.  I will explore this. Any comment?
> 

The issue should locate at function write_buff() for my board.
if define __LITTLE_ENDIAN, the function flash_add_byte() will swap the
bytes.
define CFG_FLASH_USE_BUFFER_WRITE can not solve all the problems.
For handling unaligned head and tail bytes, the byte swap issue also
exists.
For example
=> cp.b 400002 fff80002 12 (from ram to flash).
To solve the issue of general cfi_flash driver for my board. I introduce
a flag
CFG_FLASH_TSI_SWAP (tsi108/108 swap issue) and add the following patch.
Is there any comment?
Thanks.
Roy


diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c
index fd0a186..0d92a99 100644
--- a/drivers/cfi_flash.c
+++ b/drivers/cfi_flash.c
@@ -268,7 +268,7 @@ inline uchar flash_read_uchar (flash_inf
 	uchar *cp;
 
 	cp = flash_make_addr (info, 0, offset);
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_FLASH_TSI_SWAP)
 	return (cp[0]);
 #else
 	return (cp[info->portwidth - 1]);
@@ -295,7 +295,7 @@ #ifdef DEBUG
 		debug ("addr[%x] = 0x%x\n", x, addr[x]);
 	}
 #endif
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_FLASH_TSI_SWAP)
 	retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 #else
 	retval = ((addr[(2 * info->portwidth) - 1] << 8) |
@@ -327,7 +327,7 @@ #ifdef DEBUG
 		debug ("addr[%x] = 0x%x\n", x, addr[x]);
 	}
 #endif
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_FLASH_TSI_SWAP)
 	retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 		(addr[(2 * info->portwidth)]) | (addr[(3 *
info->portwidth)] << 8);
 #else
@@ -596,7 +596,6 @@ #ifdef CFG_FLASH_USE_BUFFER_WRITE
 	int buffered_size;
 #endif
 	/* get lower aligned address */
-	/* get lower aligned address */
 	wp = (addr & ~(info->portwidth - 1));
 
 	/* handle unaligned start */
@@ -892,7 +891,7 @@ static void flash_make_cmd (flash_info_t
 	int i;
 	uchar *cp = (uchar *) cmdbuf;
 
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_FLASH_TSI_SWAP)
 	for (i = info->portwidth; i > 0; i--)
 #else
 	for (i = 1; i <= info->portwidth; i++)





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