[U-Boot-Users] Flash Replacement for AT91RM9200-EK
Liu Dave-r63238
DaveLiu at freescale.com
Fri Aug 18 09:58:01 CEST 2006
> > > Hello List,
> > > i use a custom Board based on the AT91RM9200-EK.
> > > Now i want to Replace the Nor Flash AT49BV6416 by a
> larger one from
> > > Spanion.
> > > The older Atmel chip specifies 70ns Access Time, the most usual
> > > Spanion chips are slower in the 100ns Range.
> >
> > Are you still using static memory controller?
> I use the 16 Bit parallel Flash for the U-Boot start.
> >
> > > As i read the CPU Datasheet correct at 60MHz EBI Speed
> the slowest
> > > Factor 1/4 gives 67ns Cycle Time.
> > Is the 67ns BFC clock cycle time? I think so.
> This is IMHO the slowest timing for the external parallel Flash.
> >
> > > Does anyone know, how Access Time for the parallel Flash is
> > calculated
> > > and what Speed Grade is needed for a stable U-Boot out of it ?
> >
> > please refer to datasheet about access time's description.
> >
> > > Could a slower (100ns) Chip be used, how can this be adjusted ?
> > > Are there any additional Parameters for the Flash Chip to care of
> > > (Burst Mode, Multi Bank) ?
> >
> > I think the controller should support 100ns chip, if the timing is
> > not enough, You can insert wait cycle for the access?
> To change the Wait States there must a Program be already running.
> The first Opcode Fetches after Reset can't be slowed down by
> any programmable Logic.
> This Timing is adjusted by Hardware, but what are the
> Parameters for the AT91RM9200 ?
Generally, the processor will use the slowest access time to fetch the
boot code
when it come out of the reset state.
So, are you sure the default MCLK is 60MHz/4? You look up the datasheet
about
What is the defaut MCLK's freq? of cause, you can measure it directly.
-Dave
More information about the U-Boot
mailing list