[U-Boot-Users] Flash Replacement for AT91RM9200-EK

[Erdmann, Thomas]

So with MCK=60MHz and 4WS i guess that the cycle time is 83ns for the 70ns Flash.
To use the 100ns Chips one hast to increase to 5-6 Wait States - right ?

Thomas

> -----Ursprüngliche Nachricht-----
> Von: Liu Dave-r63238 [mailto:DaveLiu at freescale.com] 
> Gesendet: Freitag, 18. August 2006 11:09
> An: Erdmann, Thomas
> Betreff: RE: [U-Boot-Users] Flash Replacement for AT91RM9200-EK
> 
> > > Generally, the processor will use the slowest access time
> > to fetch the
> > > boot code  when it come out of the reset state.
> > > So, are you sure the default MCLK is 60MHz/4? You look up the 
> > > datasheet about What is the defaut MCLK's freq? of cause, you can 
> > > measure it directly.
> > > 
> > > -Dave
> > > 
> > Hello Dave,
> > i am not shure, what the exact clocking rate is.
> > All i know is, that there is a "slow clock" at 32768Hz and a "fast 
> > clock" at 18.432MHz connected.
> > The first Opcode fetches after Reset seem to be clocked 
> with the "slow 
> > clock" and now the Initialization by U-Boot sets up the 
> timing of the 
> > EBI - but what timing is selected for the parallel Flash ?
> > 
> > THX
> >   Thomas
> > 
> You can refer to defination at include/configs/at91rm9200dk.h
> /* flash */
> #define MC_PUIA_VAL     0x00000000
> #define MC_PUP_VAL      0x00000000
> #define MC_PUER_VAL     0x00000000
> #define MC_ASR_VAL      0x00000000
> #define MC_AASR_VAL     0x00000000
> #define EBI_CFGR_VAL    0x00000000
> #define SMC2_CSR_VAL    0x00003284 /* 16bit, 2 TDF, 4 WS
> */---------------This is nCS0 timing that you need
> 
> /* clocks */
> #define PLLAR_VAL       0x20263E04 /* 179.712000 MHz for PCK */
> #define PLLBR_VAL       0x10483E0E /* 48.054857 MHz (divider by 2 for
> USB) */
> #define MCKR_VAL        0x00000202 /* PCK/3 = MCK Master Clock =
> 59.904000MHz from PLLA */  ----------This is MCK setting
> 
> They are set up in cpu/arm920t/at91rm9200/lowlevel_init.S
>         /* memory control configuration */
>         /* this isn't very elegant, but  what the heck */
>         ldr     r0, =SMRDATA
>         ldr     r1, _MTEXT_BASE
>         sub     r0, r0, r1
>         add     r2, r0, #80
> 0:
>         /* the address */
>         ldr     r1, [r0], #4
>         /* the value */
>         ldr     r3, [r0], #4
>         str     r3, [r1]
>         cmp     r2, r0
>         bne     0b
>    
> -Dave
> 
>