[U-Boot-Users] Cache issue on MPC8xx

[Qichen Huang]

On 8/24/06, Jerry Van Baren <gerald.vanbaren at smiths-aerospace.com> wrote:
> Qichen Huang wrote:
> > On 8/24/06, Wolfgang Denk <wd at denx.de> wrote:
> >> In message <b4ebaa9d0608240832i212b01aey4f​e1362002756833 at mail.gmail.com> you wrote:
> >>> I did so, but still couldn't get D-Cache enabled.
> >> Then you did something wrong.
> > I have been trapped in this problem for a long time. Could you tell me
> > some more details. Thanks.
> >
> > What I did is:
> >  - set msr to 0.
> >  - disable D-cache
> >  - enable D-cache  <-- and it crashes here.
>
> This is impossibly vague.  There are many reasons for "it crashes here."
> including that it quite likely doesn't crash there.
>
> * Are you running with instruction cache enabled?  If so, your memory
> controller is probably configured OK.  If not, it is very possible that
> your memory controller isn't handling bursts properly.

I-Cache is enabled.

>
> * How do you know it crashes there?  When you turn on data cache, all of
> your peripherals, including blinkin' LEDs and your UART, get cached so
> you won't see anything unless you have set up BAT registers or the MMU
> to control the data cache such that your peripherals are NOT cached.
>

The IBAT and DBAT registers are not supported by MPC860. So, I have to
set up MMU first? It seems really complicated. :-(

> * If you have set up the BAT and/or the MMU, did you do it correctly?
>

no...

> * Did you FOLLOW THE INSTRUCTIONS in the user's guide on the proper
> sequence when messing with the MSR register?  Really weird things happen
> if you don't (or so they tell me ;-).
>
> > What is the correct way?
>
> That is the nutshell correct way.  There are a lot of details that have
> to be done right before it works, however.  There is a devil hiding in
> each and every detail.
>
> > Qichen
>
> HTH,
> gvb
>
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