[U-Boot-Users] MPC8540 mtest "hang" with 1GByte memory module

Jerry Van Baren gerald.vanbaren at smiths-aerospace.com
Wed Jul 5 18:38:56 CEST 2006


Scott Coulter wrote:
> Hi everyone,
> 
> I have a custom MPC8540-based board running U-boot 1.1.4.  The processor
> core runs at 833MHz and the memory is DDR 333MHz with ECC.  With a
> single banked SoDIMM memory module, 256 or 512Mbyte, the board can run a
> memory test and boot/run linux 2.6.15.  With a multiple banked (2)
> 1Gbyte memory module, the board can boot/run linux 2.6.15, but, the
> memory test hangs in the vicinity of the bank (512Mbyte) boundary.  The
> uboot fill command also hangs.  We can also generate a hang condition by
> doing a sequence of reads of a memory range that crosses the bank
> boundary.  Individual peeks and pokes of memory work fine.  It seems
> that a prolonged sequence of accesses is required to cause the problem.
> 
> If I run 'mtest 1fff0000 20010000' (over the 512MB boundary on a 1GB
> module), the test hangs in seconds.
> 
> If I use a 512MB SoDIMM module which use two Chip Selects (2 banks).  I
> can run 'mtest fff0000 10010000' from U-boot for hours without a
> problem.
> 
> Investigation with a JTAG emulator shows that the processor is not hung,
> but rather the code is stuck in a loop trying to output characters to
> the serial port (polling the LSR in the DUART for the transmitter to be
> empty).  According to the JTAG emulator, the data being read in the loop
> during the "hang" condition was 0.  However, if I read the register
> manually using the emulator, the value returned is 0x60 which should
> have caused the loop to exit and the character to be written.

OK, what is the system trying to send out the UART when the hang occurs? 
  Since you only send characters out the UART "when the test is done" 
either the test has been successfully completed or it is sending a 
failure message.  The two cases would cause different guesses.

> On the board, we have an LED register connected to the local bus.  If I
> write to the LEDs prior to the DUART LSR polling loop the memory test
> runs fine.  What effect should the local bus access have on the DUART
> polling loop?  According to the code and the emulator, the DUART
> registers do not show up in the data cache.

Are you missing "sync" instructions in your UART handling?  Sounds like 
the UART register operations are not being forced to run by the 
processor... when you hit the LED register, you are forcing the 
instructions to run as a side effect and all becomes well.

[snip]

> Thanks in advance,
> Scott

You are welcome in advance, ;-)
gvb




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