[U-Boot-Users] mii_send error or at least strange

Dan Malek dan at embeddedalley.com
Wed Mar 15 23:01:24 CET 2006

On Mar 15, 2006, at 4:38 PM, Ben Warren wrote:

>  I'm not sure about the 8xx PowerQUICCs, but other Freescale CPUs with 
> multiple ethernet ports support MII data plane on all ports but only 
> have one MDIO port (control plane for MII).  Maybe that's why the code 
> is this way?

That's exactly why.

	-- Dan

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