[U-Boot-Users] [PATCH] Common code for detecting new mpc8xx core.
David Ho
davidho at nanometrics.ca
Thu Mar 30 23:06:41 CEST 2006
This refines the routine for detecting new mpc8xx core.
This does however add a few bytes to the initial stack usage (Implemented as a
function).
Signed-off-by: David Ho <davidho at nanometrics.ca>
---
cpu/mpc8xx/cpu.c | 11 ++++++++++-
cpu/mpc8xx/cpu_init.c | 2 +-
include/common.h | 3 +++
include/mpc8xx.h | 7 ++++---
4 files changed, 18 insertions(+), 5 deletions(-)
f04a287d9a8f2e26d0b08f69e0f4884c8b382b6b
diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c
index 4a32986..2098256 100644
--- a/cpu/mpc8xx/cpu.c
+++ b/cpu/mpc8xx/cpu.c
@@ -357,6 +357,15 @@ int checkcpu (void)
return check_CPU (clock, pvr, immr);
}
+int mpc8xx_new_core (void)
+{
+ uint partnum = get_immr (PARTNUM_MASK);
+
+ return ((partnum == MPC866_FAMILY_PARTNUM) ||
+ (partnum == MPC885_FAMILY_PARTNUM)
+ );
+}
+
/* ------------------------------------------------------------------------- */
/* L1 i-cache */
/* the standard 860 has 128 sets of 16 bytes in 2 ways (= 4 kB) */
@@ -560,7 +569,7 @@ unsigned long get_tbclk (void)
*
* For older chips, it's just MF field of PLPRCR plus one.
*/
- if ((immr & 0x0FFF) >= MPC8xx_NEW_CLK) { /* MPC866/87x/88x series */
+ if (mpc8xx_new_core()) { /* MPC866/87x/88x series */
factor = (PLPRCR_val(MFI) + PLPRCR_val(MFN)/(PLPRCR_val(MFD)+1))/
(PLPRCR_val(PDF)+1) / (1<<PLPRCR_val(S));
} else {
diff --git a/cpu/mpc8xx/cpu_init.c b/cpu/mpc8xx/cpu_init.c
index b2c59c6..5cff8a6 100644
--- a/cpu/mpc8xx/cpu_init.c
+++ b/cpu/mpc8xx/cpu_init.c
@@ -95,7 +95,7 @@ void cpu_init_f (volatile immap_t * immr
* For newer (starting MPC866) chips PLPRCR layout is different.
*/
#ifdef CFG_PLPRCR
- if (get_immr(0xFFFF) >= MPC8xx_NEW_CLK)
+ if (mpc8xx_new_core())
mfmask = PLPRCR_MFACT_MSK;
else
mfmask = PLPRCR_MF_MSK;
diff --git a/include/common.h b/include/common.h
index d2570a8..00632e2 100644
--- a/include/common.h
+++ b/include/common.h
@@ -389,6 +389,9 @@ int checkdcache (void);
void upmconfig (unsigned int, unsigned int *, unsigned int);
ulong get_tbclk (void);
void reset_cpu (ulong addr);
+#if defined(CONFIG_8xx)
+int mpc8xx_new_core (void);
+#endif
/* $(CPU)/serial.c */
int serial_init (void);
diff --git a/include/mpc8xx.h b/include/mpc8xx.h
index 2911758..2cff376 100644
--- a/include/mpc8xx.h
+++ b/include/mpc8xx.h
@@ -132,10 +132,11 @@
#define RSR_ALLBITS (RSR_JTRS|RSR_DBSRS|RSR_DBHRS|RSR_CSRS|RSR_SWRS|RSR_LLRS|RSR_ESRS|RSR_EHRS)
/*-----------------------------------------------------------------------
- * Newer chips (MPC866 family and MPC87x/88x family) have different
- * clock distribution system. Their IMMR lower half is >= 0x0800
+ * Newer chips (MPC866 family and MPC87x/88x family)
*/
-#define MPC8xx_NEW_CLK 0x0800
+#define PARTNUM_MASK 0xFF00
+#define MPC866_FAMILY_PARTNUM 0x0800
+#define MPC885_FAMILY_PARTNUM 0x0900
/*-----------------------------------------------------------------------
* PLPRCR - PLL, Low-Power, and Reset Control Register 15-30
--
1.2.4.g79f5-dirty
More information about the U-Boot
mailing list