[U-Boot-Users] Where does U-Boot's CFI driver check for top/bottom boot?

Timur Tabi timur at freescale.com
Mon Nov 6 23:00:12 CET 2006

Tolunay Orkun wrote:

> I just looked at the datasheet of your flash part as well as datasheet
> of a couple of intel flash parts as well as the current code. As I
> suspected for your particular part, it looks like they are using the
> same values for "Erase Bank Area 1" and "Erase Bank Area 2" irrespective
> of top boot or bottom boot flash. I think, this is fundamentally wrong
> and non-compliant with the general CFI standard.

Using the PDF you specified, I see that my chip has a value of 03h for the 
"Top/Bottom Boot Sector Flag", at offset (P+F)h.  That indicates a top-boot, 
which is correct (smaller sectors at the end of memory).

Why can't we just check this byte if we're on an AMD part, and adjust accordingly?

Timur Tabi
Linux Kernel Developer @ Freescale

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