[U-Boot-Users] Please pull u-boot-83xx.git (I2C rework)
Joakim Tjernlund
joakim.tjernlund at transmode.se
Tue Nov 28 22:39:20 CET 2006
On Tue, 2006-11-28 at 15:08 -0600, Timur Tabi wrote:
> Wolfgang Denk wrote:
> > In message <456C7A18.1090309 at freescale.com> you wrote:
> >> Can you be more specific? These two macros are defined in a variety of ways in
> >> U-Boot. Soft I2C is not used on any Freescale parts (AFAIK).
> >
> > But it should be possible to use it. Please don't use incompatible
> > definitions.
>
> So you're saying that in MPC8349ITX.h, I should be able to delete this line:
>
> #define CONFIG_HARC_I2C
>
> and replace it with this line:
>
> #define CONFIG_SOFT_I2C
>
> and everything should still work????
No, see attached patch(s)
Not tested in your tree as I don't use that one (yet)
Jocke
-------------- next part --------------
From 836655f91b5f3324baa6b2d92d0f52fd86049400 Mon Sep 17 00:00:00 2001
From: jocke <Joakim.Tjernlund at transmode.se>
Date: Tue, 28 Nov 2006 22:27:00 +0100
Subject: [PATCH] Mkae fsl-i2c not conflict with SOFT I2C
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund at transmode.se>
---
drivers/fsl_i2c.c | 17 ++++++++++-------
include/asm-ppc/fsl_i2c.h | 4 ----
2 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/fsl_i2c.c b/drivers/fsl_i2c.c
index 0e39213..7ac02a0 100644
--- a/drivers/fsl_i2c.c
+++ b/drivers/fsl_i2c.c
@@ -29,6 +29,9 @@
#define I2C_TIMEOUT (CFG_HZ / 4)
+#define I2C_READ_BIT 1
+#define I2C_WRITE_BIT 0
+
/* Initialize the bus pointer to whatever one the SPD EEPROM is on.
* Default is bus 0. This is necessary because the DDR initialization
* runs from ROM, and we can't switch buses because we can't modify
@@ -110,7 +113,7 @@ i2c_wait(int write)
return -1;
}
- if (write == I2C_WRITE && (csr & I2C_SR_RXAK)) {
+ if (write == I2C_WRITE_BIT && (csr & I2C_SR_RXAK)) {
debug("i2c_wait: No RXACK\n");
return -1;
}
@@ -131,7 +134,7 @@ i2c_write_addr (u8 dev, u8 dir, int rsta
writeb((dev << 1) | dir, &i2c_dev[i2c_bus_num]->dr);
- if (i2c_wait(I2C_WRITE) < 0)
+ if (i2c_wait(I2C_WRITE_BIT) < 0)
return 0;
return 1;
@@ -148,7 +151,7 @@ __i2c_write(u8 *data, int length)
for (i = 0; i < length; i++) {
writeb(data[i], &i2c_dev[i2c_bus_num]->dr);
- if (i2c_wait(I2C_WRITE) < 0)
+ if (i2c_wait(I2C_WRITE_BIT) < 0)
break;
}
@@ -167,7 +170,7 @@ __i2c_read(u8 *data, int length)
readb(&i2c_dev[i2c_bus_num]->dr);
for (i = 0; i < length; i++) {
- if (i2c_wait(I2C_READ) < 0)
+ if (i2c_wait(I2C_READ_BIT) < 0)
break;
/* Generate ack on last next to last byte */
@@ -192,9 +195,9 @@ i2c_read(u8 dev, uint addr, int alen, u8
u8 *a = (u8*)&addr;
if (i2c_wait4bus() >= 0
- && i2c_write_addr(dev, I2C_WRITE, 0) != 0
+ && i2c_write_addr(dev, I2C_WRITE_BIT, 0) != 0
&& __i2c_write(&a[4 - alen], alen) == alen
- && i2c_write_addr(dev, I2C_READ, 1) != 0) {
+ && i2c_write_addr(dev, I2C_READ_BIT, 1) != 0) {
i = __i2c_read(data, length);
}
@@ -213,7 +216,7 @@ i2c_write(u8 dev, uint addr, int alen, u
u8 *a = (u8*)&addr;
if (i2c_wait4bus() >= 0
- && i2c_write_addr(dev, I2C_WRITE, 0) != 0
+ && i2c_write_addr(dev, I2C_WRITE_BIT, 0) != 0
&& __i2c_write(&a[4 - alen], alen) == alen) {
i = __i2c_write(data, length);
}
diff --git a/include/asm-ppc/fsl_i2c.h b/include/asm-ppc/fsl_i2c.h
index 76b1c43..4f71341 100644
--- a/include/asm-ppc/fsl_i2c.h
+++ b/include/asm-ppc/fsl_i2c.h
@@ -83,8 +83,4 @@ typedef struct fsl_i2c {
u8 res6[0xE8];
} fsl_i2c_t;
-
-#define I2C_READ 1
-#define I2C_WRITE 0
-
#endif /* _ASM_I2C_H_ */
--
1.4.3.5
-------------- next part --------------
From 8470aa771d70e022305cdcbff1353284d9d2ed58 Mon Sep 17 00:00:00 2001
From: Joakim Tjernlund <Joakim.Tjernlund at transmode.se>
Date: Tue, 28 Nov 2006 22:35:19 +0100
Subject: [PATCH] Fix I2C master address initialization.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund at transmode.se>
---
drivers/fsl_i2c.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/fsl_i2c.c b/drivers/fsl_i2c.c
index 7ac02a0..aca8c8c 100644
--- a/drivers/fsl_i2c.c
+++ b/drivers/fsl_i2c.c
@@ -60,7 +60,7 @@ i2c_init(int speed, int slaveadd)
writeb(0, &dev->cr); /* stop I2C controller */
writeb(0x3F, &dev->fdr); /* set bus speed */
writeb(0x3F, &dev->dfsrr); /* set default filter */
- writeb(slaveadd, &dev->adr); /* write slave address */
+ writeb(slaveadd<<1, &dev->adr); /* write slave address */
writeb(0x0, &dev->sr); /* clear status register */
writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
--
1.4.3.5
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