[U-Boot-Users] tsec help

[Reeve Yang]

Thanks for the help from Spence. I applied patch, it's partially working.
Actually I set REDUCED flag on interface, so the real problem should phy
register 20. I originally I set it to 0x0ce2, the mac's speed is wrong.
Thank you very much!

But it's only partially working now. I can ping out from my customized board
to another PC NIC, but cannot ping from PC to my board. I noticed tsec_halt
is call after calling ping, so maccfg1 is retored back to disable tx/rx, and
phy is shutdown. Could this be the reason? I tried to remove tsec_halt,
things become worse. Beside I can only ping one way, now it's only pingable
from my board for the first time. Anyone has solution for this?

Regards,

- Reeve

On 10/27/06, Spence Nick-rxtd10 <Nick.Spence at freescale.com> wrote:
>
>
> Try the following that was submitted as a patch for u-boot but has not
> yet been integrated:
>
> [DNX#2006102042000014] Add Marvell Phy and RGMII support to eTSEC setup
>
> This sets up the eTSEC and the Marvel Phy to support 10M,
> 100M and 1000M rates when configured in RGMII mode.
> ---
> drivers/tsec.c |    8 ++++----
> 1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/tsec.c b/drivers/tsec.c index
> 7ec565c..6cc6444 100644
> --- a/drivers/tsec.c
> +++ b/drivers/tsec.c
> @@ -583,11 +583,10 @@ static void adjust_link(struct eth_devic
>                                 regs->maccfg2 =
> ((regs->maccfg2&~(MACCFG2_IF))
>                                         | MACCFG2_MII);
>
> -                               /* If We're in reduced mode, we need
> -                                * to say whether we're 10 or 100 MB.
> +                               /* Set R100 bit in all modes although
> +                                * it is only used in RGMII mode
>                                  */
> -                               if ((priv->speed == 100)
> -                                   && (priv->flags & TSEC_REDUCED))
> +                               if (priv->speed == 100)
>                                         regs->ecntrl |= ECNTRL_R100;
>                                 else
>                                         regs->ecntrl &= ~(ECNTRL_R100);
> @@ -785,6 +784,7 @@ struct phy_info phy_info_M88E1111S = {
>                 {0x1d, 0x5, NULL},
>                 {0x1e, 0x0, NULL},
>                 {0x1e, 0x100, NULL},
> +               {0x14, 0x0cd2, NULL}, /* Add delay to RGMII TX and RX */
>                 {MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
>                 {MIIM_ANAR, MIIM_ANAR_INIT, NULL},
>                 {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
> --
> 1.4.2.3
>
> >       From: u-boot-users-bounces at lists.sourceforge.net
> [mailto:u-boot-users-bounces at lists.sourceforge.net] On Behalf Of Reeve
> Yang
> >       Sent: Thursday, October 26, 2006 7:31 PM
> >       To: u-boot-users at lists.sourceforge.net
> >       Subject: [U-Boot-Users] tsec help
> >
> >
> >       Hello,
> >
> >       My cpu is MPC8343E with dual tsec, phy is marvell 88E1111S. Now
> the physical link is up, but I just cannot ping. I printed some debug
> message about maccfg1/2 registers:
> >
> >       => ping 192.168.1.1
> >       tsec_halt
> >       Trying TSEC0
> >       tsec_halt
> >       Speed: 100, full duplex
> >       TSEC0: maccfg2 = 0x7205
> >       TSEC0: maccfg1 = 0xf
> >       Using TSEC0 device
> >       tsec_halt
> >       ping failed; host 192.168.1.1 is not alive
> >
> >       I checked the MAC transmi counter register there are packets
> sending out, but no packet on the wire. The PHY is hard wired into RGMII
> to copper mode. Could anyone who has done similiar work point to where
> the problem is? Where to look at?
> >
> >       Regards,
> >
> >       - Reeve
>
>
>
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