[U-Boot-Users] DCR register read/write for PPC440EP

[Leonid]

Hi,

I'm trying to read certain configuration register (SDR0_PINSTP) using
u-boot setdcr/getdcr commands (I run 1.1.4 u-boot on AMCC PPC440EP
Yosemite board). First thing I do is setting this register's offset
(0x40) in the SDR0_CFGADDR (0xE) DCRN:

=> setdcr e
000e: 00000020 ? 40
000e: 00000040 ? 
=> 

However it doesn't look having any effect:

=> getdcr e
000e: 00000020

And when I read SDR0_CFGDATA (0xF), I get register with offset 0x20
(SDR0_SDSTP0) as expected:

=> getdcr f
000f: 8570828a

Before I start to debug do_setdcr() function, may be somebody knows this
issue and it was even fixed?

Thanks,

Leonid.