[U-Boot-Users] MPC8343 NET without PHY
Monstr at seznam.cz
Monstr at seznam.cz
Mon Apr 23 09:00:51 CEST 2007
Hi,
We are use on development board Vitesse switch connected via RGMII. I look at MPC8349ITX which use the similar switch but only for one TSEC2 interface and via GMII.
Can MPC8349ITX load files via TSEC2?
Does U-BOOT support communication via RGMII?
And howto turn off PHY detection?
Net: TSEC0: PHY id ffff is not supported!
TSEC0: No PHY found
TSEC1: PHY id ffff is not supported!
TSEC1: No PHY found
TSEC0, TSEC1
My current setting is below.
Best regards,
Michal Simek
#ifdef CONFIG_TSEC_ENET
#define CONFIG_NET_MULTI 1 /* support for multiple interface */
#define CONFIG_MPC83XX_TSEC1 1 /* TSEC1 */
#define CONFIG_MPC83XX_TSEC2 1 /* TSEC2 */
#define CONFIG_GMII 1 /* MII PHY management */
#ifdef CONFIG_MPC83XX_TSEC1
#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
#define CFG_TSEC1_OFFSET 0x24000
#define CFG_TSEC1 (CFG_IMMR + CFG_TSEC1_OFFSET)
#define TSEC1_PHY_ADDR 0
#define TSEC1_PHYIDX 0
#define CONFIG_ETHPRIME "TSEC0" /* Options are: TSEC[0-1] */
#endif /* CONFIG_MPC83XX_TSEC1 */
#ifdef CONFIG_MPC83XX_TSEC2
#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
#define CFG_TSEC2_OFFSET 0x25000
#define CFG_TSEC2 (CFG_IMMR + CFG_TSEC2_OFFSET)
#define TSEC2_PHY_ADDR 1
#define TSEC2_PHYIDX 0
#ifndef CONFIG_ETHPRIME
#define CONFIG_ETHPRIME "TSEC0" /* Options are: TSEC[0-1] */
#endif /* CONFIG_ETHPRIME */
#endif /* CONFIG_MPC83XX_TSEC2 */
#endif /* CONFIG_TSEC_ENET */
More information about the U-Boot
mailing list