[U-Boot-Users] MPC8347/9 stack in cache (CFG_INIT_RAM_ADDR)

[Timur Tabi]

Matt Hevern wrote:

> Is anyone more familar with this or suggestions?

Well, I should be more familiar, since I wrote the support for the MPC8349E-mITX, but 
honestly I just diddled with the values until I got something working.

Have you taken a look at the latest MPC8349ITX.h?  I went through a lot of effort to make 
that file as "intelligent" as possible.

I have this:

#define CFG_INIT_RAM_ADDR	0xFD000000	/* Initial RAM address */

/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
#define CFG_IBAT6L	(0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
#define CFG_IBAT6U	(0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)

Maybe you BAT window is too small?


-- 
Timur Tabi
Linux Kernel Developer @ Freescale