[U-Boot-Users] [PATCH] Fix memory initialization on MPC8349ITX
MBenedict at twacs.com
Tue Apr 24 20:38:21 CEST 2007
Timur Tabi wrote:
> <improvements/fixes to patch and patch format>
Thank you, stay tuned for another attempt at the patch.
> I'll test this code on my ITX, however, I'm curious about one thing.
> Can you explain why this patch is okay for *all* ITX boards? I
> something about your board having
> problematic DDR or something. With your patch, all ITX and ITX-GP
> boards will set sdram_clk_cntl to the new value when SPD is used.
I am not aware of my board having a problematic DDR. Perhaps this is
the proposed fix to the issue you are thinking of? I think the big
question is how many people using the 8349ITX are using git sources.
Both Bruce and I experienced instability without this patch, to the
point the system could not boot to console. After applying this patch,
neither of us have witnessed any instability after banging on the
As I mentioned in a previous email, for the MPC8349ITX I am _reverting_
the configured value for the sdram_clk_cntl to what Freescale shipped in
their patched u-boot 1.1.3 and to the value in the mpc83xx git sources
prior to October 25, 2006. In fact, I think that a simliar patch might
need to be applied for the MPC832XEMDS for exactly the same reasons. I
think it would be helpful if you could look at the
f6eda7f80ccc13d658020268c507d7173cf2e8aa commit to
cpu/mpc83xx/spd_sdram.c and how the sdram_clk_cntl register was
initialized before/after this commit. From that, you should (hopefully)
either be able to confirm the proposed patch is doing the right thing or
tell me that I am not understanding something.
* - I lied, I do have some issues with the serial layer that I am
sorting through. However, I think this is unrelated. The instability
prior to this patch was much wider in scope.
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