[U-Boot-Users] [PATCH 1/2] mpc83xx: Fix MPC8349ITX SPD RAM initialization

[Benedict, Michael]

Signed-off-by: Bruce Leonard <Bruce_Leonard at seclinc.com>
---
define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349ITX.  This allows
ddr->sdram_clk_cntl to be properly initialized, like it was before
f6eda7f80ccc13d658020268c507d7173cf2e8aa

Patch initially suggested by Timur Tabi and implemented / tested by
Bruce
Leonard.

 include/configs/MPC8349ITX.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 37bbfb3..e0c0227 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -149,6 +149,8 @@
  */
 #define CFG_DDR_BASE           0x00000000      /* DDR is system
memory*/
 #define CFG_SDRAM_BASE                 CFG_DDR_BASE
+#define CFG_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
+                               DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
 #define CFG_DDR_SDRAM_BASE     CFG_DDR_BASE
 #define CFG_83XX_DDR_USES_CS0
 #define CFG_MEMTEST_START      0x1000          /* memtest region */
--
1.4.4.4