[U-Boot-Users] [ARM] TI DaVinci (TMS320DM644x) support [5/5]

ksi at koi8.net ksi at koi8.net
Mon Aug 6 02:33:14 CEST 2007


Signed-off-by: Sergey Kubushyn <ksi at koi8.net>

=== Cut ===
diff -purN u-boot.git.orig/include/common.h u-boot.git/include/common.h
--- u-boot.git.orig/include/common.h	2007-08-04 22:07:13.000000000 -0700
+++ u-boot.git/include/common.h	2007-08-05 16:19:52.000000000 -0700
@@ -233,6 +233,9 @@ int	saveenv	     (void);
  void inline setenv   (char *, char *);
  #else
  void	setenv	     (char *, char *);
+#ifdef CONFIG_HAS_UID
+void	forceenv     (char *, char *);
+#endif
  #endif /* CONFIG_PPC */
  #ifdef CONFIG_ARM
  # include <asm/mach-types.h>
diff -purN u-boot.git.orig/include/configs/davinci.h u-boot.git/include/configs/davinci.h
--- u-boot.git.orig/include/configs/davinci.h	1969-12-31 16:00:00.000000000 -0800
+++ u-boot.git/include/configs/davinci.h	2007-08-05 16:19:52.000000000 -0700
@@ -0,0 +1,292 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi at koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/sizes.h>
+
+/*
+ * Define this to make U-Boot skip low level initialization when loaded
+ * by initial bootloader. Not required by NAND U-Boot version but IS
+ * required for a NOR version used to burn the real NOR U-Boot into
+ * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
+ * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
+ * NOR U-Boot is loaded directly from Flash so it must perform all the
+ * low level initialization itself. NAND version is loaded by an initial
+ * bootloader (UBL in TI-ese) that performs such an initialization so it's
+ * skipped in NAND version. The third DaVinci boot mode loads a bootloader
+ * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
+ * performing low level init prior to loading. All that means we can NOT use
+ * NAND version to put U-Boot into NOR because it doesn't have NOR support and
+ * we can NOT use NOR version because it performs low level initialization
+ * effectively destroying itself in DDR memory. That's why a separate NOR
+ * version with this define is needed. It is loaded via UART, then one uses
+ * it to somehow download a proper NOR version built WITHOUT this define to
+ * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
+ * NOR support into the initial bootloader so it won't be needed but DaVinci
+ * static RAM might be too small for this (I have something like 2Kbytes left
+ * as of now, without NOR support) so this might've not happened...
+ *
+#define CONFIG_NOR_UART_BOOT
+ */
+
+/*===========================================================================*/
+/* Board, choose one */
+/*===========================================================================*/
+#define DV_EVM
+/*
+#define DV_EVM
+#define SONATA_BOARD
+#define SCHMOOGIE
+*/
+#ifdef SONATA_BOARD
+#if defined(DV_EVM) || defined(SCHMOOGIE)
+#error "Multiple boards defined in davinci.h !!!"
+#endif
+#define CFG_NAND_SMALLPAGE
+#define CFG_USE_NOR
+#elif defined(DV_EVM)
+#if defined(SONATA_BOARD) || defined(SCHMOOGIE)
+#error "Multiple boards defined in davinci.h !!!"
+#endif
+#define CFG_NAND_SMALLPAGE
+#define CFG_USE_NOR
+#elif defined(SCHMOOGIE)
+#if defined(SONATA_BOARD) || defined(DV_EVM)
+#error "Multiple boards defined in davinci.h !!!"
+#endif
+#define CFG_NAND_LARGEPAGE
+#define CFG_USE_NAND
+#else
+#error "No board defined in davinci.h !!!"
+#endif
+/*===================*/
+/* SoC Configuration */
+/*===================*/
+#define CONFIG_ARM926EJS			/* arm926ejs CPU core */
+#define CONFIG_SYS_CLK_FREQ	297000000	/* Arm Clock frequency */
+#define CFG_TIMERBASE		0x01c21400	/* use timer 0 */
+#define CFG_HZ_CLOCK		27000000	/* Timer Input clock freq */
+#define CFG_HZ			1000
+/*====================================================*/
+/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
+/* on Sonata/DV_EVM board. No EEPROM on schmoogie.    */
+/*====================================================*/
+#if defined(SONATA_BOARD) || defined(DV_EVM)
+#define CFG_I2C_EEPROM_ADDR_LEN		2
+#define CFG_I2C_EEPROM_ADDR		0x50
+#define CFG_EEPROM_PAGE_WRITE_BITS	6
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	20
+#endif
+/*=============*/
+/* Memory Info */
+/*=============*/
+#define CFG_MALLOC_LEN		(0x10000 + 256*1024)	/* malloc() len */
+#define CFG_GBL_DATA_SIZE	128		/* reserved for initial data */
+#define CFG_MEMTEST_START	0x80000000	/* memtest start address */
+#define CFG_MEMTEST_END		0x81000000	/* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE	(256*1024)	/* regular stack */
+#define PHYS_SDRAM_1		0x80000000	/* DDR Start */
+#if defined(SONATA_BOARD) || defined(SCHMOOGIE)
+#define PHYS_SDRAM_1_SIZE	0x08000000	/* DDR size 128MB */
+#define DDR_4BANKS				/* 4-bank DDR2 (128MB) */
+#elif defined(DV_EVM)
+#define PHYS_SDRAM_1_SIZE	0x10000000	/* DDR size 256MB */
+#define DDR_8BANKS				/* 8-bank DDR2 (256MB) */
+#else
+#error "No DDR memory configuration in davinci.h !!!"
+#endif
+#ifdef DDR_4BANKS
+#define KMEM			"mem=56M "
+#elif defined(DDR_8BANKS)
+#define KMEM			"mem=120M "
+#else
+#error "Invalid DDR configuration in davinci.h !!!"
+#endif
+
+/*====================*/
+/* Serial Driver info */
+/*====================*/
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE	4		/* NS16550 register size */
+#define CFG_NS16550_COM1	0x01c20000	/* Base address of UART0 */
+#define CFG_NS16550_CLK		27000000	/* Input clock to NS16550 */
+#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
+#define CONFIG_BAUDRATE		115200		/* Default baud rate */
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+/*===================*/
+/* I2C Configuration */
+/*===================*/
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CFG_I2C_SPEED		80000	/* 100Kbps won't work, silicon bug */
+#define CFG_I2C_SLAVE		10	/* Bogus, master-only in U-Boot */
+/*==================================*/
+/* Network & Ethernet Configuration */
+/*==================================*/
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_MII
+#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_DNS | CONFIG_BOOTP_DNS2 | CONFIG_BOOTP_SEND_HOSTNAME)
+#define CONFIG_NET_RETRY_COUNT	10
+#ifdef SCHMOOGIE
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+#ifdef CFG_USE_NAND
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_NO_FLASH
+#define CFG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
+#ifdef CFG_NAND_SMALLPAGE
+#define CFG_ENV_SECT_SIZE	512	/* Env sector Size */
+#define CFG_ENV_SIZE		SZ_16K
+#else
+#define CFG_ENV_SECT_SIZE	2048	/* Env sector Size */
+#define CFG_ENV_SIZE		SZ_128K
+#endif
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT	/* to a proper address, init done */
+#define CFG_NAND_BASE		0x02000000
+#define CFG_NAND_HW_ECC
+#define CFG_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
+#define NAND_MAX_CHIPS		1
+#define CFG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
+#define DEF_BOOTM		""
+#elif defined(CFG_USE_NOR)
+#ifdef CONFIG_NOR_UART_BOOT
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT	/* to a proper address, init done */
+#else
+#undef CONFIG_SKIP_LOWLEVEL_INIT
+#undef CONFIG_SKIP_RELOCATE_UBOOT
+#endif
+#define CFG_ENV_IS_IN_FLASH
+#undef CFG_NO_FLASH
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_MAX_FLASH_BANKS	1		/* max number of flash banks */
+#ifdef SONATA_BOARD
+#define CFG_FLASH_SECT_SZ	0x20000		/* 128KB sect size AMD Flash */
+#define CFG_ENV_OFFSET		(CFG_FLASH_SECT_SZ*2)
+#elif defined(DV_EVM)
+#define CFG_FLASH_SECT_SZ	0x10000		/* 64KB sect size AMD Flash */
+#define CFG_ENV_OFFSET		(CFG_FLASH_SECT_SZ*3)
+#else
+#error "Unknown board in NOR Flash config (davinci.h) !!!"
+#endif
+#define PHYS_FLASH_1		0x02000000	/* CS2 Base address 	 */
+#define CFG_FLASH_BASE		PHYS_FLASH_1	/* Flash Base for U-Boot */
+#define PHYS_FLASH_SIZE		0x2000000	/* Flash size 32MB 	 */
+#define CFG_MAX_FLASH_SECT	(PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ)
+#define CFG_ENV_SECT_SIZE	CFG_FLASH_SECT_SZ	/* Env sector Size */
+#if (CFG_FLASH_SECT_SZ == 0x20000)
+#define DEF_BOOTM		"; bootm 0x2060000"
+#elif (CFG_FLASH_SECT_SZ == 0x10000)
+#define DEF_BOOTM		"; bootm 0x2050000"
+#else
+#error "Invalid NOR Flash Sector Size in davinci.h !!!"
+#endif
+#else
+#error "Bogus Flash configuration !!!"
+#endif
+/*=====================*/
+/* Board related stuff */
+/*=====================*/
+#ifdef SCHMOOGIE
+#define CONFIG_RTC_DS1337		/* RTC chip on SCHMOOGIE */
+#define CFG_I2C_RTC_ADDR	0x68	/* RTC chip I2C address */
+#define CONFIG_HAS_UID
+#define CONFIG_UID_DS28CM00		/* Unique ID on SCHMOOGIE */
+#define CFG_UID_ADDR		0x50	/* UID chip I2C address */
+#endif
+/*==============================*/
+/* U-Boot general configuration */
+/*==============================*/
+#undef 	CONFIG_USE_IRQ			/* No IRQ/FIQ in U-Boot */
+#define CONFIG_MISC_INIT_R
+#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
+#define CFG_PROMPT		"U-Boot > "	/* Monitor Command Prompt */
+#define CFG_CBSIZE		1024		/* Console I/O Buffer Size  */
+#define CFG_PBSIZE		(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print buffer sz */
+#define CFG_MAXARGS		16		/* max number of command args */
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR		0x80700000	/* default Linux kernel load address */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE		/* Won't work with hush so far, may be later */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2	"> "
+#define CONFIG_CMDLINE_EDITING
+#define CFG_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+/*===================*/
+/* Linux Information */
+/*===================*/
+#define LINUX_BOOT_PARAM_ADDR	0x80000100
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS		KMEM "console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTCOMMAND	"setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot" DEF_BOOTM
+/*=================*/
+/* U-Boot commands */
+/*=================*/
+#define COMMON_CMD_SET		(CONFIG_CMD_DFL |\
+				CFG_CMD_PING |\
+				CFG_CMD_DHCP |\
+				CFG_CMD_I2C |\
+				CFG_CMD_DIAG |\
+				CFG_CMD_ASKENV |\
+				CFG_CMD_SAVES |\
+				CFG_CMD_MII)
+#ifdef CFG_USE_NAND
+#define CUSTOM_CMD_SET		((COMMON_CMD_SET |\
+				CFG_CMD_NAND) &\
+				~(CFG_CMD_FLASH |\
+				CFG_CMD_IMLS))
+#elif defined(CFG_USE_NOR)
+#define CUSTOM_CMD_SET		((COMMON_CMD_SET |\
+				CFG_CMD_FLASH |\
+				CFG_CMD_JFFS2) &\
+				~(CFG_CMD_NAND))
+#else
+#error "Either CFG_USE_NAND or CFG_USE_NOR _MUST_ be defined !!!"
+#endif
+#ifdef SCHMOOGIE
+#define CONFIG_COMMANDS		((CUSTOM_CMD_SET) |\
+				(CFG_CMD_DATE))
+#elif defined(DV_EVM) || defined(SONATA_BOARD)
+#define CONFIG_COMMANDS		((CUSTOM_CMD_SET) |\
+				(CFG_CMD_EEPROM))
+#else
+#define CONFIG_COMMANDS		(CUSTOM_CMD_SET)
+#endif
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+/*=======================*/
+/* KGDB support (if any) */
+/*=======================*/
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX	1	/* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff -purN u-boot.git.orig/include/dp83848.h u-boot.git/include/dp83848.h
--- u-boot.git.orig/include/dp83848.h	1969-12-31 16:00:00.000000000 -0800
+++ u-boot.git/include/dp83848.h	2007-08-05 16:19:52.000000000 -0700
@@ -0,0 +1,88 @@
+/*
+ * DP83848 ethernet Physical layer
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi at koi8.net>
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+
+/* National Semiconductor PHYSICAL LAYER TRANSCEIVER DP83848 */
+
+#define DP83848_CTL_REG		0x0	/* Basic Mode Control Reg */
+#define DP83848_STAT_REG		0x1	/* Basic Mode Status Reg */
+#define DP83848_PHYID1_REG		0x2	/* PHY Idendifier Reg 1 */
+#define DP83848_PHYID2_REG		0x3	/* PHY Idendifier Reg 2 */
+#define DP83848_ANA_REG			0x4	/* Auto_Neg Advt Reg  */
+#define DP83848_ANLPA_REG		0x5	/* Auto_neg Link Partner Ability Reg */
+#define DP83848_ANE_REG			0x6	/* Auto-neg Expansion Reg  */
+#define DP83848_PHY_STAT_REG		0x10	/* PHY Status Register  */
+#define DP83848_PHY_INTR_CTRL_REG	0x11	/* PHY Interrupt Control Register */
+#define DP83848_PHY_CTRL_REG		0x19	/* PHY Status Register  */
+
+/*--Bit definitions: DP83848_CTL_REG */
+#define DP83848_RESET		(1 << 15)  /* 1= S/W Reset */
+#define DP83848_LOOPBACK	(1 << 14)  /* 1=loopback Enabled */
+#define DP83848_SPEED_SELECT	(1 << 13)
+#define DP83848_AUTONEG		(1 << 12)
+#define DP83848_POWER_DOWN	(1 << 11)
+#define DP83848_ISOLATE		(1 << 10)
+#define DP83848_RESTART_AUTONEG	(1 << 9)
+#define DP83848_DUPLEX_MODE	(1 << 8)
+#define DP83848_COLLISION_TEST	(1 << 7)
+
+/*--Bit definitions: DP83848_STAT_REG */
+#define DP83848_100BASE_T4	(1 << 15)
+#define DP83848_100BASE_TX_FD	(1 << 14)
+#define DP83848_100BASE_TX_HD	(1 << 13)
+#define DP83848_10BASE_T_FD	(1 << 12)
+#define DP83848_10BASE_T_HD	(1 << 11)
+#define DP83848_MF_PREAMB_SUPPR	(1 << 6)
+#define DP83848_AUTONEG_COMP	(1 << 5)
+#define DP83848_RMT_FAULT	(1 << 4)
+#define DP83848_AUTONEG_ABILITY	(1 << 3)
+#define DP83848_LINK_STATUS	(1 << 2)
+#define DP83848_JABBER_DETECT	(1 << 1)
+#define DP83848_EXTEND_CAPAB	(1 << 0)
+
+/*--definitions: DP83848_PHYID1 */
+#define DP83848_PHYID1_OUI	0x2000
+#define DP83848_PHYID2_OUI	0x5c90
+
+/*--Bit definitions: DP83848_ANAR, DP83848_ANLPAR */
+#define DP83848_NP		(1 << 15)
+#define DP83848_ACK		(1 << 14)
+#define DP83848_RF		(1 << 13)
+#define DP83848_PAUSE		(1 << 10)
+#define DP83848_T4		(1 << 9)
+#define DP83848_TX_FDX		(1 << 8)
+#define DP83848_TX_HDX		(1 << 7)
+#define DP83848_10_FDX		(1 << 6)
+#define DP83848_10_HDX		(1 << 5)
+#define DP83848_AN_IEEE_802_3	0x0001
+
+/*--Bit definitions: DP83848_ANER */
+#define DP83848_PDF		(1 << 4)
+#define DP83848_LP_NP_ABLE	(1 << 3)
+#define DP83848_NP_ABLE		(1 << 2)
+#define DP83848_PAGE_RX		(1 << 1)
+#define DP83848_LP_AN_ABLE	(1 << 0)
+
+/*--Bit definitions: DP83848_PHY_STAT */
+#define DP83848_RX_ERR_LATCH		(1 << 13)
+#define DP83848_POLARITY_STAT		(1 << 12)
+#define DP83848_FALSE_CAR_SENSE		(1 << 11)
+#define DP83848_SIG_DETECT		(1 << 10)
+#define DP83848_DESCRAM_LOCK		(1 << 9)
+#define DP83848_PAGE_RCV		(1 << 8)
+#define DP83848_PHY_RMT_FAULT		(1 << 6)
+#define DP83848_JABBER			(1 << 5)
+#define DP83848_AUTONEG_COMPLETE	(1 << 4)
+#define DP83848_LOOPBACK_STAT		(1 << 3)
+#define DP83848_DUPLEX			(1 << 2)
+#define DP83848_SPEED			(1 << 1)
+#define DP83848_LINK			(1 << 0)
diff -purN u-boot.git.orig/include/_exports.h u-boot.git/include/_exports.h
--- u-boot.git.orig/include/_exports.h	2007-02-12 10:41:27.000000000 -0800
+++ u-boot.git/include/_exports.h	2007-08-05 16:19:52.000000000 -0700
@@ -14,6 +14,9 @@ EXPORT_FUNC(vprintf)
  EXPORT_FUNC(do_reset)
  EXPORT_FUNC(getenv)
  EXPORT_FUNC(setenv)
+#ifdef CONFIG_HAS_UID
+EXPORT_FUNC(forceenv)
+#endif
  EXPORT_FUNC(simple_strtoul)
  #if (CONFIG_COMMANDS & CFG_CMD_I2C)
  EXPORT_FUNC(i2c_write)
diff -purN u-boot.git.orig/include/exports.h u-boot.git/include/exports.h
--- u-boot.git.orig/include/exports.h	2007-02-12 10:41:27.000000000 -0800
+++ u-boot.git/include/exports.h	2007-08-05 16:19:52.000000000 -0700
@@ -23,6 +23,9 @@ void do_reset (void);
  unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base);
  char *getenv (char *name);
  void setenv (char *varname, char *varvalue);
+#ifdef CONFIG_HAS_UID
+void forceenv (char *varname, char *varvalue);
+#endif
  #if (CONFIG_COMMANDS & CFG_CMD_I2C)
  int i2c_write (uchar, uint, int , uchar* , int);
  int i2c_read (uchar, uint, int , uchar* , int);
diff -purN u-boot.git.orig/include/linux/mtd/mtd.h u-boot.git/include/linux/mtd/mtd.h
--- u-boot.git.orig/include/linux/mtd/mtd.h	2007-02-12 10:41:27.000000000 -0800
+++ u-boot.git/include/linux/mtd/mtd.h	2007-08-05 16:19:52.000000000 -0700
@@ -11,6 +11,11 @@
  #include <linux/types.h>
  #include <linux/mtd/mtd-abi.h>

+#if 0
+#define CONFIG_MTD_DEBUG		1
+#define CONFIG_MTD_DEBUG_VERBOSE	3
+#endif
+
  #define MAX_MTD_DEVICES 16

  #define MTD_ERASE_PENDING      	0x01
@@ -201,11 +206,19 @@ static inline void mtd_erase_callback(st
  #define MTD_DEBUG_LEVEL3	(3)	/* Noisy   */

  #ifdef CONFIG_MTD_DEBUG
+#if 0
  #define DEBUG(n, args...)				\
   	do {						\
  		if (n <= CONFIG_MTD_DEBUG_VERBOSE)	\
  			printk(KERN_INFO args);		\
  	} while(0)
+#else
+#define DEBUG(n, args...)				\
+	do {						\
+		if (n <= CONFIG_MTD_DEBUG_VERBOSE)	\
+			printf(args);		\
+	} while(0)
+#endif
  #else /* CONFIG_MTD_DEBUG */
  #define DEBUG(n, args...) do { } while(0)

=== Cut ===

---
******************************************************************
*  KSI at home    KOI8 Net  < >  The impossible we do immediately.  *
*  Las Vegas   NV, USA   < >  Miracles require 24-hour notice.   *
******************************************************************




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