[U-Boot-Users] RFC: Xilinx Spartan3 relocation code

[Bruce_Leonard at selinc.com]

Stefan,

> > > I fixed and added some things for the generic FPGA boot. Patches 
will be
> > > posted with the new board patch.

Sorry for the late reply, had a big BBQ this weekend for my anniversary 
and haven't checked my e-mail in three or four days.  Could you please let 
me know what your patches are going to look like?  I don't want to push up 
any patches that will cover/conflict things you've got in your queue.

> > trouble getting the FPGA to program.  We're currently assuming that 
our
> > interface to the FPGA is broken, but if there's known issues in the
> > generic code that would be nice to know :).

I finally figured out what stupid thing I was doing.  Both the FPGA and 
the PPC are big endian, however if the processor is little endian the data 
needs to be bit-swapped before going to the FPGA over SelectMap.  When I 
was commenting out the code to do the bit-swapping (which we don't need to 
do) I got over zealous by one line and wasn't initializing a pointer.  So 
I was sending nothing but 0x24 to the FPGA.  Wonder why it didn't program? 
:0

I'm going to try and come up with a clean way (probably a config option) 
of doing or not doing the bit-swap thing in code.  If you're running a bit 
endian system you really don't need or want to do it.  Little endian 
systems, unless you're very carefull with your HW design, you want to do 
it.  I'll have a patch for it in a couple of days.  I was thinking 
something along the lines of "#define CFG_NO_SELECTMAP_BITSWAP".  If it's 
not defined the code does the bit-swap, which is the way everything 
currently works.  Or should it be a CONFIG instead?

Bruce